RX Family
ADC Module Using Firmware Integration Technology
R01AN1666EJ0220 Rev. 2.20
Page 64 of 74
Dec 01, 2016
/* HAVE COMPARATOR CHECK ON CHANNELS 3-4 FOR DROPPING BELOW 1.65V */
cmpwin.compare_mask = ADC_MASK_CH3 | ADC_MASK_CH4;
cmpwin.compare_maskb = ADC_COMP_WINB_CH5;
cmpwin.above_level_mask = 0; // Condition met when below level
cmpwin.above_level_maskb = ADC_COMP_WINB_COND_BELOW;
cmpwin.level_lo = 0x7FF; // 12-bit 3.3V=0xFFF,
1.65V=0x7FF
cmpwin.level_lob = 0x7FF; // 12-bit 3.3V=0xFFF,
1.65V=0x7FF
cmpwin.int_priority = 3;
cmpwin.windowa_enable = true;
cmpwin.windowb_enable = true;
R_ADC_Control
(0, ADC_CMD_EN_COMPARATOR_LEVEL, &cmpwin);
/* After open, wait 1 us or longer before A/D conversion starts */
/* ENABLE TRIGGERS */
R_ADC_Control
(0
,
ADC_CMD_ENABLE_TRIG, NULL);
/* INTERRUPT OCCURS UPON SCAN COMPLETION */
:
/* Callback called from interrupt level: */
void MyCallback(void *p_args)
{
adc_cb_args_t *args;
uint16_t data3,data4,data5;
args = (adc_cb_args_t *)p_args;
/* READ RESULTS */
if (args->event == ADC_EVT_SCAN_COMPLETE)
{
R_ADC_Read
(0, ADC_REG_CH3, &data3);
R_ADC_Read
(0, ADC_REG_CH4, &data4);
R_ADC_Read
(0, ADC_REG_CH5, &data5);
}
if (args->event == ADC_EVT_CONDITION_MET)
{
if (args->compare_flags & ADC_MASK_CH3)
{
// processing when channel 3 voltage is too low
}
else
{
// processing when channel 4 voltage is too low
}
}
if (args->event == ADC_EVT_CONDITION_METB)
{
// processing when channel 5 voltage is too low
}
}