QB-V850MINIL, QB-V850MINI Emulator 3. On-Chip Debugging
R20UT0221EJ0400 Rev.4.00
Page 40 of 86
2013.08.30
3.5.3
Connecting the FLMD0 signal (for V850E2, V850E1, or V850ES)
FLMD0 is the signal used to switch the system to flash programming mode. Control the status of FLMD0 on
QB-V850MINIL or QB-V850MINI as follows in accordance with the status of the debugger.
Table 3-3. Status of FLMD0 Signal on QB-V850MINIL or QB-V850MINI
Debugger Status
Status of FLMD0
During
a break
When writing to the flash memory
Note
High-level (CMOS output)
When not writing to the flash memory
High impedance
While the user-created program is executing
Terminated
Note
When downloading a program or when writing in the Assemble or Memory window.
Figure 3-12. Timing of FLMD0 on QB-V850MINIL or QB-V850MINI
Handle the FLMD0 signal as shown in one of below (a) or (b) or (C). Whether the FLMD0 signal needs to be connected
or not depends on the specifications of the target device.
（
a
）
When not performing flash self programming
Connect the FLMD0 signal output from QB-V850MINIL or QB-V850MINI to the FLMD0 pin on the target
device.
As long as there are no problems arising from the specifications of the target device, pull the signal down to low
level. Determine the resistance value of the pull-down resistor by referring to the user's manual of the target
device.
Figure 3-13. Example Connection of FLMD0 Pin When Used by QB-V850MINIL or QB-V850MINI
3.3 V
V
DD
74LVC1T45
DIR
FLMD0
Target system
FLMD0
FLMD0
Hi-Z
Hi-Z
High level
When rewriting the flash memory
during a break
Target device
QB-V850MINIL/
QB-V850MINI
