Renesas M306K9T2-CPE, Руководство пользователя

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IMPORTANT
Note on Restrictions in Using the Emulator (1/2):
• The following restrictions apply to this emulator.
(1) Debug command execution when the BCLK is stopped
When the BCLK is stopped, debug commands (break, dump, single-step, forced stop, etc.)
cannot be executed. The BCLK can stop in the following cases.
• When the target clock is not oscillating
• When the target MCU is in stop mode
• When the target MCU is in wait mode
(2) MCU status while a program is stopped
With this emulator, the program is stopped with a loop program to a specific address. Note
that, in this case, peripheral circuits are still operating.
(3) Interrupts during single-step execution
Interrupts are disabled during single-step execution. Accordingly, interrupt processing is not
performed even if an interrupt request is sent.
(4) Address matched interrupt
Do not set software breaks for an address for which an address matched interrupt is set. In step
execution, do not execute addresses that generate address matched interrupts.
(5) Stop and wait modes
Do not use a single-step for an instruction that shifts to stop mode. Operation does not shift
to wait mode when the instruction that shifts to wait mode is executed as a single-step.
(6) Stack area
With this emulator, user stacks specified by ISP consume 4 bytes. If there is not enough user
stack area, using other areas not designed for use as stacks (SFR area, RAM area that stored
data or ROM area) can damage the user program or destabilize emulator control. Therefore,
ensure a m4 bytes of the area used by the user program as user stack area.
(7) Trace results for addresses that set software breaks
Software breaks replace the original instruction with the BRK instruction that generates the
BRK interrupt. When trace results are viewed in the bus display, "00h" is displayed by
fetching (by instruction) the address that sets the software break, however in the reverse
assembly display, the "BRK" instruction is displayed.
(8) Reading MCU's internal resources
When the registers that are listed below are read with an emulator, those results will be the
following (the data in the MCU are not effected).
• Results of real-time trace: The data values of the cycles read are not displayed correctly.
• Real-time RAM monitor: The data values read are not displayed correctly.
(9) Debug command execution during user program execution
The real-time aspect of the user program is not guaranteed when debug commands such as
dump are executed during user program execution.
(10) Reset vector area
• Memory in the emulator main unit is always selected as a reset vector area.
• You can change data in the reset vector area only when the user program is stopped.
Register Symbol
DMA source pointers 0, 1 SAR0, SAR1
DMA destination pointers 0, 1 DAR0, DAR1
DMA transfer counters 0, 1 TCR0, TCR1
DMA control registers 0, 1 DM0CON, DM1CON