8V19N850 Hardware Design Guide
X0120307 Rev.1.0
Mar 25, 2021
Page 8
Figure 8. General Layout Exam ple for Single-ended LVCMOS to XO_DPLL
2.3
OSCI/OSCO Input (XTAL, XO, OCXO/TCXO)
The OSCI input receives a signal from a crystal. It can be overdriven by oscillation sources like XO, OCXO, and
TCXO. The limitation of the frequency range is provided in the datasheet. The OSCI input mainly provides a
signal source for APLL0, APLL1, and APLL2. The OCSI source can also be used to SysAPLL. The OCSI source
cannot be used for SysDPLL. The OCSI signal source phase noise needs to have good performance so that it
provides a good close-end phase noise performance at the 8V19N850 output. The OCSI signal source can be
XO, OCXO, or TCXO.
When an XO to OSCI is used in conjunction with an OCXO at the XO_DPLL input, the XO is used for APLL0,
APLL1, or APLL2. This OCSI input must be a good phase noise performance and higher frequency (~38MHz to
54MHz). The OCXO to the XO_DPLL to the SysDPLL/SysDPLL must be frequency stable but it does not need to
have as good phase noise performance as the XO to the OSCI. The OCXO can be lower frequency (e.g.,
10MHz to 20MHz).
The OCSI/OSCO input contains an oscillation circuit and can interface with a crystal. Figure 9 provides an
example of a parallel resonant crystal to OCSI/OSCO input interface. The OCSI input can also be overdriven by
an oscillator with a single-ended driver. Figure 10 shows an example of a single-ended oscillator overdrive OSCI
input with AC coupling. The unused OCSO can be left floating.
Figure 9. Crystal to OSCI input interface Exam ple
C1
VCC=3.3V
Zo
R3
R2
5.1k
XO_DPLL Input
+
-
OCXO/TCXO LVCMOS
R1
5.1K
R5
100
Ro
R4
100
CL1
8V19N850 OSCI input
OSCI
OSCO
CL2
X1
