Renesas 8V19N850, Руководство пользователя

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8V19N850 Hardware Design Guide
X0120307 Rev.1.0
Mar 25, 2021 Page 10
Figure 11. LVPECL Style Term ination
Table 3. V
T
Values for Output Term ination in Figure 11
Output Supply Voltage Output Am plitude V
TT
V
DDO_V
= 1.8V 350mV V
DDO_v
– 1.50V
500mV V
DDO_v
– 1.75V
V
DDO_V
= 2.5V 350mV V
DDO_v
– 1.50V
500mV V
DDO_v
– 1.75V
V
DDO_V
= 3.3V 350mV V
DDO_v
– 1.50V
500mV V
DDO_v
– 1.75V
750mV V
DDO_v
– 2.0V
1000mV V
DDO_v
– 2.25V
High Impedance Input
+
-
Zo = 50
R1
50
No Built-in Termination
VDDO_v
VTT
Zo = 50
LVPECL Driv er
R2
50