Theory of Operation
4
4
4-17
The EPC-9 contains programmable byte-swapping hardware to allow programs to
read or write VMEbus memory in either byte order. The EPC-9 uses the Tundra
Universe supervisor address modifier bit, AM bit 2, to control byte-swapping. This bit
is emitted by the Universe chip and intercepted by the EPC-9 byte-swap control
hardware which uses it to control whether or not byte-swapping occurs. The EPC-9
always asserts AM bit 2 to the VMEbus, so only supervisor accesses are possible.
The four slave images written to VMEbus memory are controlled by setting the
Universe’s SUPER bitfield (bits 12 and 13) of the four Slave Image Control Registers
(LSI0_CTL through LSI3_CTL). Setting SUPER to 01 disables swapping, producing
an Intel (little-endian) image, while setting SUPER to to 00 enables swapping,
producing a Motorola (big-endian) image. You use little-endian images to map
VMEbus memory to another Intel processor and big-endian images to map VMEbus
memory to a Motorola processor.
The Slave Image Control Registers are described in the
Universe User’s Manual, available on the world-wide web at:
http://www.newbridge.com/Tundra/Products/Bus/BPI/Univdn.html. The particular
control registers for each image are described in Appendix A.
Slave Image
Control Register
Offset
LSI0_CTL
100h
LSI1_CTL
114h
LSI2_CTL
128h
LSI3_CTL
13Ch
When you perform a single byte (D08) access, the byte order makes no difference.
However, word (D16) or double-word (D32) accesses may require byte-swapping.
When you select little-endian, bytes pass straight through unchanged. You should
only use little endian when you read or write data between two Intel processor
systems. The result of using little-endian byte ordering to transfer a double-word
integer between an Intel processor and a Motorola processor are shown below.
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