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EPC-8A Hardware Reference

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bit is then set if four rising edges of the SYSCLK signal are detected. This bit
is intended to be used to detect that SYSCLK is being generated on the
backplane.

READY

This is a RAM bit defined by the VXI specification. In a VXIbus software
environment, if READY=1 and PASS=1, the EPC-8A is ready to accept
VXI-defined messages. This bit is read-only from the VME port and may be
read/written from the PC port. This bit is also held clear while the SRST bit is
asserted. When deasserting SRST via an I/O write to this register, a second
write is required to reassert the READY bit, since the READY bit is held in
reset until just after the first write completes.

PASS

This bit is read-only from the VME port and may be read/written from the PC
port. This bit is also held clear while the SRST bit is asserted. When
deasserting SRST via an I/O write to this register, a second write is required to
reassert the PASS bit since the PASS bit is held in reset until just after the first
write completes.

1

The EPC-8A completed its self test successfully.

0

The Test LED on the EPC-8A front panel is lit.

NOSF

SYSFAIL inhibit. If set, the EPC-8A does not assert the VMEbus SYSFAIL
line due to the PASS bit being cleared. If the PASS bit is clear and this bit is
clear, then SYSFAIL is asserted. SYSFAIL is also asserted when a Watchdog
timeout reset occurs, independent of the setting of this bit. This bit may be read/
written from both the VME and PC ports.

SRST

Soft Reset. Setting this bit places the EPC-8A into the soft reset state. This bit
may be read/written from both the VME and PC ports.

MODID

This read-only bit is connected to pin 30 in row A of the VMEbus P2
connector. If clear (0), it denotes that the pin is being pulled high. (This is used
in VXI systems for module identification.) Note, this bit is defined but not
implemented in the EPC-8A and always returns a value of 1. If future versions
of the product need this capability it can be provided by installing a resistor.

SYSR

SYSRESET. The EPC-8A asserts the VME SYSRESET line while this bit is 1.
When using this bit, it is the software’s responsibility to ensure that the
VME-specified minimum assertion time of SYSRESET is met. This bit may
be read/written from the PC port, but is read-only from the VME port.

R

A read/write bit that is available for software use (For example, SURM).

RESDET

This bit is cleared by a hardware reset. Once this bit is written to “1” from the
PC-port (read-only from the VME port) it can only be set to zero by a hardware
reset. This bit is used by the firmware to determine if a software or hardware
reset is in progress and it set to “1” before any OS or application is invoked.

Reserved (8146h and 8147h)

These registers are reserved and return all ones if read.

Lower

1

1

1

1

1

1

1

1

Upper

1

1

1

1

1

1

1

1

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Содержание EPC-8A

Страница 1: ...EPC 8A Hardware Reference RadiSys Corporation 5445 NE Dawson Creek Drive Hillsboro OR 97124 503 615 1100 FAX 503 615 1150 www radisys com 07 0961 01 December 1998 ...

Страница 2: ...RadiSys are registered trademarks of RadiSys Corporation All other trademarks registered trademarks service marks and trade names are the property of their respective owners December 1998 Copyright 1998 by RadiSys Corporation All rights reserved ...

Страница 3: ...xplains how the EPC 8A works 5 Programming the VMEbus Interface Describes the EPC 8A VMEbus interface as seen by a program Appendix Description A Chipset and I O Map Defines the I O addresses decoded by the EPC 8A B Interrupts and DMA Channels Lists the EPC 8A s interrupt assignments C Connectors Specifies the EPC 8A s connector details D Memory Lists the EPC 8A s SIMM specifications E Subplanes D...

Страница 4: ... radisys com J Error Messages and Diagnosis Provides troubleshooting information in these areas Problems that do not display an error message Beep codes audible codes consist of patterns of beeps and pauses Error and warning messages K Configuring the Ethernet Drivers Provides instructions for configuring network interface drivers after you install the EPC 8A Notes indicate important information a...

Страница 5: ...Peripherals to the EPC 8A 10 Remaining Steps 10 Chapter 3 BIOS Configuration BIOS Setup Screens 11 Main BIOS Setup Menu 12 IDE Adapter Sub Menus 13 Memory Cache Sub Menu 15 Memory Shadow Sub Menu 16 About Shadow Memory Regions 16 Boot Sequence Sub Menu 17 Keyboard Features Menu 19 Advanced Menu 20 Integrated Peripherals Sub Menu 22 EXM Menu 23 VME Menu 25 Exit Menu 26 Chapter 4 Theory of Operation...

Страница 6: ... System Slot 1 Controller Functions 39 VMEbus Access 39 Byte Ordering 40 VMEbus Interrupt Response 41 VME Extension Registers VXI 41 Passing VME Interrupts and Events to the CPU 42 Chapter 5 Programming the VMEbus Interface Concepts 43 Atomic access 43 Read Modify Write Operations 43 Setting the VMEbus Access Bit 44 Real Mode E page VMEbus Accesses 44 Supported Address Modifiers 45 Low Level Progr...

Страница 7: ... 8146h and 8147h 76 Protocol Register Signal FIFO 8148h and 8149h 77 Response Register 814Ah and 814Bh 77 Reserved 814C and 814D 79 Message Low Register 814Eh and 814Fh 79 VME A31 24 Address Register 8150h 79 VME Modifier Register 8151h 79 VME Interrupt State Register 8152h 80 VME Interrupt Enable Register 8153h 80 VME Event State Register 8154h 80 VME Event Enable Register 8155h 80 VME Interrupt ...

Страница 8: ...94 Chips and Technologies web site 94 Utility software 95 Microsoft Windows 3 1 95 Before upgrading from a previous release 95 Microsoft Windows 95 96 Driver Installation Procedure 96 OSR2 Driver Installation Procedure 96 Appendix J Error Messages and Diagnosis Troubleshooting 99 BIOS Beep Codes 100 Common Error Messages 100 Appendix K Configuring the Ethernet Drivers NetWare IPX Driver for DOS In...

Страница 9: ...ced menu 20 Figure 3 8 Integrated Peripherals sub menu 22 Figure 3 9 EXM menu 23 Figure 3 10 Slot Numbering 24 Figure 3 11 VME menu 25 Figure 3 12 Exit menu 26 Figure 4 1 Block Diagram 30 Figure 4 2 Flash Boot Device Memory 32 Figure 4 3 Using little endian byte ordering 40 Figure 4 4 Using big endian byte ordering 41 Figure 4 5 Passing VME interrupts and events to the CPU 42 Figure E 1 EXP BP1 Su...

Страница 10: ... EXM Configuration 53 Table A 10 Second Interrupt Controller RadiSys R400EX emulating 8259 of PC AT 53 Table A 11 Second 16 bit DMA Controller RadiSys R400EX emulating 8237 of PC AT 53 Table A 12 Coprocessor Interface For the EPC 8A DX DX replaces the 80287 of PC AT 54 Table A 13 EXM Configuration 54 Table A 14 Ethernet 54 Table A 15 Serial I O Com2 Port National Semiconductor PC87336 emulating 82...

Страница 11: ...IOS EPROM RadiSys standard EXM expansion interface for adding PC architecture peripherals or interfaces PhoenixBIOS with RadiSys enhancements to support the additional on board features and VMEbus environment Standard PC peripheral interfaces including an RS232 serial port and a bi directional parallel port all with standard interface connectors The PS 2 style keyboard connector includes an adapte...

Страница 12: ...isk VMEbus The VMEbus implementation provides a complete bus interface with enhancements for multiprocessor environments For detailed information continue reading System controller functions With a single hardware configuration jumper the EPC 8A can provide full VME SLOT 1 arbitration functions When enabled the provided functions include priority and round robin bus arbitration IACK and bus grant ...

Страница 13: ...sing facility Specifications Table 1 1 EPC 8A Environmental Specifications Characteristic Value Temperature Operating 0 60 C at point of entry of forced air derated 2 C per 1000 ft 300 m over 6600 ft 2000m Storage 40 to 85 C 5 C per hour max excursion gradient Humidity Operating 5 95 noncondensing Storage 5 95 noncondensing Altitude Operating 0 10 000 ft 3000 m Storage 0 40 000 ft 12 000 m Vibrati...

Страница 14: ...6 IH 1 7 Requester ROR RONR Arbiter RRS PRI System controller SYSCLK IACK and bus grant daisy chains bus time out error BERR VXI Device type Message based Protocols Commander master interrupter Manufacturer code 4076 RadiSys Corporation Model code 196 if configured for slot 0 452 if configured for other than slot 0 Table 1 2 Additional EPC 8A Specifications Characteristic Value ...

Страница 15: ...from its anti static bag unless you are in a static free environment The EPC 8A like most electronic devices is susceptible to electrostatic discharge ESD damage ESD damage is not always immediately obvious It can cause a partial breakdown in semiconductor devices that might not result in immediate failure During the installation process ensure that power to your system is off The EPC 8A is not de...

Страница 16: ...e Flash Jumper JP2 FLSH enables the resident Flash memory for writing and must be installed when using software such as the XFORMAT utility The Recovery Jumper JP2 RCVR must be installed only to recover a corrupted BIOS For example if the power source was interrupted during a BIOS upgrade and the corrupt BIOS can only be reflashed by a Flash recovery floppy disk installed on EXM Slot 0 Selecting t...

Страница 17: ...MEbus Backplane Jumpers The VMEbus propagates four bus grant signals BG0 BG3 and one interrupt acknowledge signal IACK via daisy chain lines Per the VMEbus specifications all boards that plug into the backplane are required to correctly handle these signals All slots that do not have a board plugged into the backplane for example empty slots and slots occupied by EXMs or mass storage modules need ...

Страница 18: ...not or if the VMEbus slot is empty all or some of these signals must be jumpered See Figures 2 3 and 2 4 on the following pages for examples The figure above shows the jumpers required for a five slot EPC 8A subsystem consisting of a two slot EPC 8A an EXP MC module carrier for two additional EXM modules and an EXP MX storage module Note that the left most slot does not require any jumpers All oth...

Страница 19: ...en the slot being jumpered and the next lower numbered slot For example jumpers for Slot 6 would be located adjacent to Slot 6 between Slots 5 and 6 Consult your VME chassis reference manual or contact the chassis manufacturer if you are unsure where to jumper your particular system EPC 8A Insertion The EPC 8A must be installed onto a subplane that fits between the EPC 8A and the VMEbus backplane ...

Страница 20: ...ns in power Never plug in a serial or parallel device keyboard transceiver monitor or other component while the system is ON The next step of installation is connecting peripherals typically a video display and keyboard but also perhaps a mouse modem printer etc Pin outs for the EPC 8A front panel connectors are specified in Appendix C Connectors Remaining Steps The remaining configuration steps m...

Страница 21: ...dware The BIOS Setup can only be entered during the system reset process following a power up front panel reset or equivalent Press the F2 key when prompted to enter Setup You can always press the F2 key to enter the BIOS setup screens even if the prompt is suppressed You can suppress the F2 key prompt in the BIOS setup Press the up and down cursor arrow keys to move from field to field Press the ...

Страница 22: ...ave Sub Menus Displays a menu that you use to enter disk drive information When entered the Main Menu shows the drive selected For more information see IDE Adapter Sub Menus on page 13 Memory Cache Sub Menu Controls the use of the CPU cache For more information see Memory Cache Sub Menu on page 15 Memory Shadow Sub Menu The term Memory Shadow refers to the technique of copying information from ROM...

Страница 23: ... your choice displays in the Main menu For more information see Boot Sequence Sub Menu on page 17 Keyboard Features Numlock Sub Menu Displays a menu that you use to enable or disable the Numlock key and key click and set the keyboard auto repeat rate and delay The Numlock setting displays for this entry in the Main Menu For more information turn to the section concerning the Keyboard Features sub ...

Страница 24: ... an IDE disk but cannot employ the Autotype feature then select User for the Type and enter the correct drive values for cylinders heads sectors track and write precomp from the label attached by RadiSys at the factory If yours is not an IDE hard disk drive select None You can also set the Type to Auto which causes POST to autotype the IDE drive every time it runs For disks not supplied by RadiSys...

Страница 25: ...e Level 1 L1 cache The default is Enabled Figure 3 3 Memory Shadow sub menu PhoenixBIOS Setup Copyright 1985 95 Phoenix Technologies Ltd Memory Cache Item Specific Help Memory Cache Enabled F1 Help Select Item Change Values F9 Setup Defaults ESC Exit Select Menu Enter Select Sub Menu F10 Previous Values Main ...

Страница 26: ...the ROM increases system performance Do not enable shadowing for the region you may have specified for installing Flash or VME disks When these ROMs are installed they are automatically shadowed Figure 3 4 Memory Shadow sub menu PhoenixBIOS Setup Copyright 1985 95 Phoenix Technologies Ltd Memory Shadow Item Specific Help System Shadow Enabled Video Shadow Enabled Shadow Memory Regions C800 CBFF Di...

Страница 27: ...rom the C drive C then A Used to boot from the C drive whether Flash or IDE or if none is present boot from the A drive C only Used to boot from the C drive without searching for an A drive The setting chosen here displays in the Boot Sequence Sub Menu prompt SETUP prompt Enables or disables the message Press F2 to enter Setup Even if the message is disabled you can still press F2 to enter the Set...

Страница 28: ...ns at addresses C8000 CC000 D000 D4000 D8000 and DC000 for more devices up to the maximum of two There are many different boot options Two supported directly on the EPC 8A hardware and BIOS are booting from a Flash ROMdisk and booting from a VME ROM disk For more information on booting from a VME ROMdisk or a Flash ROMdisk refer to setups in the Advanced Menu and Appendix G XFORMAT Software Floppy...

Страница 29: ...ets the auto repeat rate if holding a key down on the keyboard The rates are from 2 30 per second Keyboard auto repeat delay Sets the delay between when a key is pressed and when the auto repeat feature begins Options are 1 4 1 2 3 4 and one second When finished with this menu press ESC to exit back to the main BIOS Setup Menu Figure 3 6 Keyboard features sub menu PhoenixBIOS Setup Copyright 1985 ...

Страница 30: ...ccurs first the system generates a VMEbus SYSRESET The EPC 8A then either halts displaying an error message or simply reboots depending on the entry here Large Disk Access Mode If using a drive larger than 528 Mbytes set this to DOS if you are running DOS or set this to Other if using a different operating system Figure 3 7 Advanced menu PhoenixBIOS Setup Copyright 1985 95 Phoenix Technologies Ltd...

Страница 31: ...disk also known as RFA or Resident Flash Array serial update BIOS extension Use this option to update a corrupt Flash ROMdisk from the COM1 port Options include DC000 DFFF0h D8000 DBFF0h D4000 D7FF0h D0000 D3FF0h CC000 CFFF0h C8000 CBFFFh Not Installed Important Do not place at the same base address as other BIOS extensions VME ROMdisk Enables VME memory on the EPC 8A This must be selected for the...

Страница 32: ...disk BIOS extension to enable scanning 00000000 FFF00000 A32 00000000 00F00000 A24 FF000000 FFF00000 A24 Field Description COM port Enables or disables the COM1 and COM2 ports The defaults include COM1 3F8 and IRQ4 COM2 2F8 and IRQ3 LPT port Enables or disables the LPT port The default is 378 and IRQ 7 Field Description Figure 3 8 Integrated Peripherals sub menu PhoenixBIOS Setup Copyright 1985 95...

Страница 33: ...ions include ECP Enables the parallel port s Extended Capabilities Port ECP Bi directional Enables the parallel port as bi directional Output only Enables the parallel port as output only When you are finished press ESC to exit back to the Advanced Menu Field Description Figure 3 9 EXM menu PhoenixBIOS Setup Copyright 1985 95 Phoenix Technologies Ltd Main Advanced VME Exit EXM Slot 31 ID FD Option...

Страница 34: ...EXM expansion module installed Note that most EXM hardware reference manuals depict a different BIOS setup from the EPC 8A The ID OB1 OB2 information is valid When using EXMs with configurable interrupts DMA channels I O addresses and or memory addresses avoid conflicts with built in functions of the EPC 8A Guidelines are If an interrupt is needed use IRQ3 IRQ5 IRQ9 IRQ12 or IRQ15 IRQ7 can be used...

Страница 35: ...ng the highest priority This determines which VMEbus request signal the EPC 8A uses when it accesses the VMEbus Arbitration Mode Selects the arbitration mode Possible values are Round Robin or Priority This determines how the EPC 8A performs bus arbitration when it is the VMEbus Slot 1 controller If round robin is selected the four bus request lines have equal priority If Priority is selected bus ...

Страница 36: ...ther end users made changes Backup CMOS to Flash Immediately saves current Setup settings to CMOS RAM and into FBD main block 1 Restore CMOS from Flash Immediately restores CMOS RAM and updates current Setup settings from FBD main block 1 Erase CMOS from Flash Immediately erases the CMOS image from the flash CMOS Restore Condition Determines under what conditions the System BIOS restores CMOS RAM ...

Страница 37: ...entation and procedures provided with that distribution If you select this option by mistake changes made to the BIOS are lost unless already saved using the Save Current Values option The system automatically seaches for the update program that should be on the floppy disk inserted in drive A If no floppy exists two series of beep codes sound a long and two short beeps followed by three short bee...

Страница 38: ...EPC 8A Hardware Reference 28 ...

Страница 39: ...e customary PC peripheral interfaces for keyboard two serial ports a parallel port and a battery backed real time clock are connected by the EXM expansion interface which is electrically similar to the standard PC ISA bus An Ethernet controller is built onto the EPC 8A board The VMEbus interface includes special VME byte swapping hardware to aid the software when dealing with different processor a...

Страница 40: ...ath coprocessor The Dual slot EPC 8A contains an Intel486 DX4 32 bit bus interface running at 100 MHz with a built in math coprocessor VGA 32 bit VMEbus Figure 4 1 Block Diagram VME byte swap 486 100MHz option FPM EDO Parity DRAM Video Display memory R400EX System Controller Kybd Ctlr RTC BIOS SRAM Buffer Serial Parallel Controller Ethernet Buffer Ethernet Controller Buffer Flash Controller 1MB Fl...

Страница 41: ...r s 32 bit address space The BIOS consists of an 16K boot block and a System BIOS combined with a VGA BIOS in a 128 Kbyte partition The Flash boot device is memory addressed and resides in the last 512 Kbytes of system memory at address FFF80000H to FFFFFFFFH The layout is described in Figure 4 2 Table 4 1 Memory at addresses between 0 and 1MB 0FFFFFh Range Content 000000 09FFFF DRAM first 640 KB ...

Страница 42: ... is backed up to and restored from Main Block 2 of the FBD as determined by the settings in the BIOS Setup Exit Menu This allows you to save your settings to nonvolatile flash memory and to specify the conditions under which CMOS is to be restored from the FBD For more information see the Exit Menu section of Chapter 3 BIOS Configuration on page 26 Jumper JP2 BIOS must be installed for Save to wor...

Страница 43: ...ry is accessed via 8 bit read write registers and physically appears on the EXM expansion interface as if it is in slot 31 It is enabled as if it were a standard RadiSys EXM expansion card in that slot The EPC returns an ID of FD to a read of address 100 This is the same ID that would be returned from a RadiSys EXM 2A card You can use the optional XFORMAT EXE utility to format and load the residen...

Страница 44: ...ister 815Dh This resets the counter value and resumes counting The interrupt is signaled on IRQ10 The timer event also clears WDT bit in the BES register bit 3 of register 8154h Application software that utilizes this timer should take care to reset the counter just prior to enabling the interrupt bit in register 8155h This inhibits a spurious timer event from occurring just after enabling the tim...

Страница 45: ...puts TXD and TXD are tristated if RTS is unasserted for RS485 multidrop compatibility The port has 10K ohm termination Parallel Port The printer port is a standard PC printer port The parallel port supports bi directional communication compatible with the PS 2 definition It is configured as LPT1 I O address 378 37F IRQ7 If not needed LPT1 can be disabled in the setup screen to free up the I O addr...

Страница 46: ...ating system Table 4 3 Reset Conditions Power On Reset Power 3 0 V Power 3 4 5 V Front Panel Reset Button Ctrl Alt Del VMEbusSYSRESET Asserted Watchdog Timer Cold reset Cold reset Warm reset Warm reset Software reset Warm reset Warm reset POST runs POST runs POST runs POST runs No POST POST runs POST runs R400EX all VXI registers reset R400EX all VXI registers reset R400EX most VXI registers reset...

Страница 47: ... EPC 8A s connection to the VME bus without interrupting or resetting the 486 processor on the EPC 8A The Soft Reset state is entered when the SRST bit is set In this state the EPC 8A removes any asserted interrupts clears the Interrupt Generator register disables its VME master logic asserts both the VMER and BERR sticky bits in the VME Event State register disables watchdog timer resets and inte...

Страница 48: ...Response register The signal FIFO called SRFIFO henceforth is a two element array with indexes A write to VPR from the VXI is a write to the signal register and FIFO and does the following if SIG FSIG LSIG FIFO full assert BERR else if SIG LSIG LSIG SRFIFO LSIG data_bus SIG 1 A read from SRFL returns the low order byte of SRFIFO FSIG In all cases of accesses to SRFL and SRFH if SIG 0 empty FIFO th...

Страница 49: ... are power and ground address lines A31 A24 data lines D16 D31 VMEbus System Slot 1 Controller Functions Every VMEbus system must have a System Slot 1 Controller The Slot 1 controller provides the following functionality Serves as the bus arbiter priority or round robin Drives the 16 MHz SYSCLK signal Starts the IACK bus grant daisy chain Provides Bus time out function When configured as the Slot ...

Страница 50: ...0000 20FFFFFF accesses the A24 space with little endian byte ordering When performing a single byte D08 access the byte order makes no difference However word D16 or double word D32 accesses may require byte swapping When little endian is selected bytes pass straight through unchanged Little endian should only be used when reading or writing data between two Intel processor systems The results of ...

Страница 51: ... provides a means of selecting the byte ordering during memory copy operations VMEbus Interrupt Response When the EPC 8A s Interrupt Generator register 815Fh is used to assert an interrupt the EPC 8A formulates a status ID value that is transmitted on the bus as the response to a matching interrupt acknowledgment cycle The EPC 8A acts as both a D08 O and D16 interrupter For D08 interrupt acknowled...

Страница 52: ...ies an asserted interrupting state The primary purpose of the state registers is to let the interrupt handler software determine which interrupts and events generated the IRQ10 interrupt to the processor The state registers can also be read by non interrupt handler software to poll for the state of these signals The enable registers allow one to mask selectively these 14 states A 0 state bit and a...

Страница 53: ... address space is visible to the operating system memory map For protected mode operating systems the EPC 8A provides direct mapping of the VMEbus into the PC memory space above 256 MByte Atomic access The EPC 8A supports atomic access to the VMEbus data for data lengths not greater than 32 bits and only then if it is aligned to its natural boundary for instance 32 bit data must be aligned on a 32...

Страница 54: ... is going to enable the E page window care must be taken to ensure that the Operating System does not use this address space Otherwise a memory conflict occurs that will cause the Operating System to fail at some point Real Mode E page VMEbus Accesses The following summarizes the source of the VMEbus address lines for accesses through the E page A32 A24 A16 It should be noted that the EPC 8A drive...

Страница 55: ...s address modifier lines AM3 and AM0 since for all defined address modifier values in the VMEbus specification AM3 is 1 and AM0 is the inverse of AM1 Therefore these two bit values are generated by hardware Bits 7 6 Since the A16 space does not use VMEbus address lines A23 A22 set these values to 1 VME WA 23 22 11 Bit 5 Set the byte order to little endian BORD 0 Bit 4 Clear the IACK bit so this is...

Страница 56: ...dress modifier to A16 supervisory access wptr WORD far 0xE0000000L addr data wptr Read through window Example 2 Example 2 performs a byte 8 bit write into the VMEbus A32 space Here the upper 16 bits of the VME address need to be stored in the appropriate registers 1 Set the VME E page enable bit in Register 8102h 2 Set register 8150h with the value corresponding to the 8 high order address bits 3 ...

Страница 57: ...ed for handling interrupts Enable the appropriate registers VME Interrupt enable 8153h and VME Event enable 8155h registers to allow the interrupts you want to respond to Enable IRQ10 on the EPC s equivalent of the 8259 interrupt controller A VXIbus message interrupt is generated when a master this EPC 8A or another master writes to the Message Low register 16 bit from the VMEbus A message interru...

Страница 58: ...orm a read of the VMEbus where the address being read reflects the interrupt level being responded to Address lines A3 A1 must reflect the interrupt level in binary form Multiply the interrupt level by 2 and use that as the address of the read operation 5 After the read operation clear the IACK bit in the VME Modifier register If the interrupt is a VXIbus message interrupt the interrupt is acknowl...

Страница 59: ...isters When using the EPC 8A this way to perform VMEbus accesses you would typically set up the E page window for interrupt acknowledge accesses Also note that the direct access mappings do not cover the entire VMEbus A32 address range and do not provide all VMEbus defined address modifier encodings but you can use the E page mechanism if needed to provide these Generating IACKs in Protected Mode ...

Страница 60: ...keeps the watchdog timer from expiring on a warm reset that is not initiated from a source other than a watchdog timeout ENSYSO bit 6 of 815Dh also has to be cleared by the BIOS must set the BTOE bit the VME Bus Timeout Enable bit The watchdog timer is enabled by setting the WDTR bit bit 3 of register 815Dh Note that a watchdog hardware reset results in a warm hardware reset An I O read to address...

Страница 61: ...nnel 2 count 006 Channel 3 address 007 Channel 3 count 008 Command status 009 DMA request 00A Command register R Single bit DMA req mask W 00B Mode 00C Set byte pointer R Clear byte pointer W 00D Temporary register R Master clear W 00E Clear mode req counter R Clear all DMA req mask W 00F All DMA request mask Table A 2 First Interrupt controller RadiSys R400EX emulating 8259 of PC AT I O Addr Func...

Страница 62: ...Day Clock RadiSys R400EX emulating MC146818 of PC AT I O Addr Functional group Usage 070 Real time clock RTC index reg R400EX NMI enable 071 RTC data register 0 seconds 1 seconds alarm 2 minutes 3 minutes alarm 4 hours 5 hours alarm 6 day of week 7 date of month 8 month 9 year A status A B status B C status C D status D E RAM 3F RAM Table A 7 DMA Page Registers RadiSys R400EX emulating 74LS612 of ...

Страница 63: ...t DMA Controller RadiSys R400EX emulating 8237 of PC AT I O Addr Functional group Usage 0C0 DMA Channel 4 address 0C2 Channel 4 count 0C4 Channel 5 address 0C6 Channel 5 count 0C8 Channel 6 address 0CA Channel 6 count 0CC Channel 7 address 0CE Channel 7 count 0D0 Command status 0D2 DMA request 0D4 Command register R Single bit DMA req mask W 0D6 Mode 0D8 Set byte pointer R Clear byte pointer W 0DA...

Страница 64: ...ulating 8251 of PC AT I O Addr Functional group Usage 2F8 COM2 serial port Receiver transmitter buffer Baud rate divisor latch LSB 2F9 Interrupt enable register Baud rate divisor latch MSB 2FA Interrupt ID register 2FB Line control register 2FC Modem control register 2FD Line status register 2FE Modem status register Table A 16 Parallel I O LPT1 Port National Semiconductor PC87336 emulating 8255 o...

Страница 65: ...ble A 18 Serial I O Com1 Port National Semiconductor PC87336 emulating 8552 of PC AT I O Addr Functional group Usage 3F8 COM1 serial port Receiver transmitter buffer Baud rate divisor latch LSB 3F9 Interrupt enable register Baud rate divisor latch MSB 3FA Interrupt ID register 3FB Line control register 3FC Modem control register 3FD Line status register 3FE Modem status register Table A 19 EPC Reg...

Страница 66: ...e high low 814F Message high high 8150 VME and misc control VME map WA31 24 8151 VME modifier 8152 VME interrupt state 8153 VME interrupt enable 8154 VME event state 8155 VME event enable 8158 VME interrupt generator 815C Unique Logical Address Register 815D Module status control 815E Signal FIFO lower 815F Signal FIFO upper 8380 On board EXM 2A Flash low order address if present 8381 Flash low mi...

Страница 67: ...ort IRQ5 Unassigned IRQ6 Usually needed for floppy disk controller IRQ7 LPT1 parallel port IRQ8 Real time clock IRQ9 Unassigned IRQ10 VME interrupt event IRQ11 Unassigned IRQ12 Unavailable you must use external keyboard option to free IRQ12 IRQ13 Coprocessor IRQ14 IDE disk controller IRQ15 Unassigned Table B 2 DMA Channels Channel Description 0 Unassigned 8 bit 1 Unassigned 8 bit 2 Usually needed ...

Страница 68: ...EPC 8A Hardware Reference 58 ...

Страница 69: ...from the point of view of looking into the front of the connector on the EPC 8A RS 232 Port COM1 The RS 232 serial port is a male DB 9 DTE RS 422 485 Port COM2 The modified RS 422 485 serial port is a female DB 9 connector Table C 1 DB 9 Pin Out Pin Signal Pin Signal 1 Carrier detect 6 Data set ready 2 Receive data 7 Request to send 3 Transmit data 8 Clear to send 4 Data terminal ready 9 Ring indi...

Страница 70: ...ne feed 2 DB0 15 Error 3 DB1 16 Initialize printer 4 DB2 17 Select in 5 DB3 18 Signal ground 6 DB4 19 Signal ground 7 DB5 20 Signal ground 8 DB6 21 Signal ground 9 DB7 22 Signal ground 10 Acknowledge 23 Signal ground 11 Busy 24 Signal ground 12 Paper end 25 Signal ground 13 Select 26 Table C 4 Keyboard Pin out Pin Signal Pin Signal 1 Data 4 5V 2 Not used 5 Clock 3 Ground 6 Not used 1 Reference vol...

Страница 71: ...ler Table C 5 DB 15 Pin out Pin Signal Pin Signal 1 Red 9 key 2 Green 10 Ground 3 Blue 11 not used 4 not used 12 not used 5 Ground 13 Horizontal sync 6 Ground 14 Vertical sync 7 Ground 15 programmable 8 Ground output 5 1 15 11 6 10 Table C 6 RJ45 Phone Jack Pin out Pin Signal Pin Signal 1 Tx 5 No connect 2 Tx 6 Rx 3 Rx 7 No connect 4 No connect 8 No connect 1 2 3 4 5 6 7 8 ...

Страница 72: ...EPC 8A Hardware Reference 62 ...

Страница 73: ...or better Single sided or double sided For 8 MB Use a 2M x 36 SIMM RadiSys P N 70 0041 We recommend Toshiba THM362020ASG 80 For 16 MB Use a 4M x 36 SIMM RadiSys P N 70 0053 We recommend Toshiba THM364020SG 70 For32 MB Use a 8 MB x 36 SIMM RadiSys P N 70 0150 We recommend Microhn MT24D836G 6 After upgrading the memory reboot the system An error message displays concerning memory Press F2 to enter t...

Страница 74: ...EPC 8A Hardware Reference 64 ...

Страница 75: ...ubsystem configuration a specific subplane may need installing Locate the appropriate subsection for the subplane you are using either by name or by picture Follow the directions in the appropriate subsection EXP BP1 Subplane Figure E 1 EXP BP1 Subplane This subplane is used in the smallest configuration where a single slot EPC 8A processor is used by itself The EXP BP1 is a rectangular shaped boa...

Страница 76: ... jumpering the backplane plug the subplane into the VMEbus backplane such that the P2 connector on the back of the 4 row DIN is pressed into the J2 connector of the left most VMEbus slot that the EPC 8A subsystem will occupy The lower EXM EXM connector is denoted as EXM slot 0 and the upper as slot 1 as shown in the diagram This information is needed later when configuring the installed EXMs Inser...

Страница 77: ... BP4 is a T shaped board with four connectors on the front side and three on the rear After jumpering the backplane plug the subplane into the VMEbus backplane such that the P2 connector on the back of the 4 row DIN is pressed into the J2 connector of the left most VMEbus slot that the EPC 8A subsystem will occupy The EXM slot numbers are shown in the drawing Insert EPC 8A in these two slots ...

Страница 78: ...The EXP BP3A has five connectors on each side After jumpering the backplane plug the subplane into the VMEbus backplane such that the P2 connector on the back of the 4 row DIN is pressed into the J2 connector of the left most VMEbus slot that the EPC 8A subsystem will occupy The EXM slot numbers are shown in the drawing Insert EPC 8A in these two slots ...

Страница 79: ...ule The EXP BP5 has six connectors on the front side and five on the rear After jumpering the backplane plug the subplane into the VMEbus backplane such that the P2 connector on the back of the 4 row DIN is pressed into the J2 connector of the left most VMEbus slot that the EPC 8A subsystem will occupy The EXM slot numbers are shown in the drawing Insert EPC 8A in these two slots ...

Страница 80: ...he EXP BP4A has seven connectors on each side After jumpering the backplane plug the subplane into the VMEbus backplane such that the P2 connector on the back of the 4 row DIN is pressed into the J2 connector of the left most VMEbus slot that the EPC 8A subsystem will occupy The EXM slot numbers are shown in the drawing Insert EPC 8A in these two slots ...

Страница 81: ...P MX Mass Storage module The EXP BP6 has eight connectors on the front side and seven on the rear Plug the subplane into the VMEbus backplane such that the P2 connector on the back of the 4 row DIN is pressed into the J2 connector of the left most VMEbus slot that the EPC 8A subsystem will occupy The EXM slot numbers are shown in the drawing Insert EPC 8A in these two slots ...

Страница 82: ...EPC 8A Hardware Reference 72 ...

Страница 83: ...1 1 1 1 1 1 1 8147h Protocol Register lower 1 1 1 1 1 1 1 1 8148h Protocol Register upper 0 0 0 1 1 1 1 1 8149h Response Register lower R RRIEN 1 SIG MLCK WRCP FSIG LSIG 814Ah Response Register upper 0 1 DOR DIR ERR RRDY WRDY 1 814Bh Reserved lower 1 1 1 1 1 1 1 1 814Ch Reserved upper 1 1 1 1 1 1 1 1 814Dh Message Low Reg lower RAM 814Eh Message Low Reg upper RAM 814Fh Message A31 24 Address Reg V...

Страница 84: ...atically set by the BusManager software when using EPConnect Please note the VMER bit bit 5 of the VME Event State register if asserted also disables this function but does not clear the VME 32 bit 1 Enables VME access through the DOS E page 0 The E page is available for DOS use VGA VGA enable If set 1 thisbit enablesthe VGA controller This bit powers upclear and if theBIOSdetects another VGA cont...

Страница 85: ...register adheres to the VXIbus specification The value defines the EPC 8A as having a model code of 0C4h if it is a slot 0 controller and 1C4h if it is not a slot 0 controller Note that the S bit is a read write bit that must be set by BIOS very early in the boot sequence This bit may also be read written from the VME port Status Control Register 8144h and 8145h This register adheres to the VXIbus...

Страница 86: ...sserted SYSFAIL is also asserted when a Watchdog timeout reset occurs independent of the setting of this bit This bit may be read written from both the VME and PC ports SRST Soft Reset Setting this bit places the EPC 8A into the soft reset state This bit may be read written from both the VME and PC ports MODID This read only bit is connected to pin 30 in row A of the VMEbus P2 connector If clear 0...

Страница 87: ...s All of these bits may read written except where noted below from both the PC and VME ports Some of this bits may also be cleared by certain hardware events as described below DOR RAM bit available to software for VXI communication protocols DIR RAM bit available to software for VXI communication protocols ERR RAM bit available to software for VXI communication protocols RRDY Read ready A 1 denot...

Страница 88: ...ition For 16 bit messages he writes into the Message Low register The bits RRDY WRDY and MLCK in the response register are altered by hardware detected conditions A read from the message low clears RRDY A write into all or the lower 8 bits of the message low register clears WRDY A read from the VME bus port of the Alternate Bus Response register clears MLCK if WRDY is set A read from the Alternate...

Страница 89: ...ess through its E page to the VMEbus Bits 7 and 6 provide VME address bits A23 and A22 respectively Bits 3 0 define the value placed on the associated VMEbus address modifier lines Register bits are not defined for the VMEbus address modifier AM3 and AM0 lines since for all defined address modifier values in the VMEbus specification AM3 is 1 and AM0 is the inverse of AM1 Therefore these two bit va...

Страница 90: ...ACFAIL is asserted BERR This bit is cleared asserted low when an access from the EPC 8A to the VMEbus is terminated with a BERR bus error It is also held clear when the SRST bit is set This bit may be deasserted by writing a 1 provided SRST is not asserted into this bit position SYSF VMEbus SYSFAIL is asserted WDT Watchdog timer expired VMER A SYSRESET or soft reset has occurred This bit is held c...

Страница 91: ...er contains the EPC 8A s ULA The ULA contents are used to map the EPC 8A s register set into VME A16 space as described below in the VMEbus Mapped Registers section The ULA is changed by writing into this register or into the ID register Module Status Control Register 815Dh This register contains the following miscellaneous status and control bits Only bit 3 WDTR is cleared by a warm reset All bit...

Страница 92: ... defined below Please note that the odd addresses from VME port accesses the lower byte registers addressed by even PC I O addresses The registers may be accessed using D08 and or D16 accesses from the VME port The registers occupy the first 16 bytes of the 64 byte space but DTACK BERR in the case of an LWORD or Signal FIFO overflow access are signaled for accesses within the entire 64 byte region...

Страница 93: ...use the XFORMAT utility program to Build DOS file structures on the EPC 8A s optional resident flash memory Build file system images that can be used in VME RAM disks For complete information about XFORMAT see the XFORMAT Software User s Manual Appendix G G ...

Страница 94: ...EPC 8A Hardware Reference 84 ...

Страница 95: ... section Configuring Additional Ethernet Controllers Installing the Software Under DOS 5 0 or higher or in a DOS window insert the optional Net1 distribution diskette in the floppy drive and switch the command line to that floppy drive The DOS INSTALL BAT file creates a subdirectory on the hard disk and copies the collection of software drivers and configuration files from the distribution disks t...

Страница 96: ...ernet controller for the first time to change the configuration or to configure multiple Ethernet controllers select Display Change Adapter Configuration in the main menu To diagnose problems or verify the configuration select Diagnostics If more than one Ethernet controller requires configuration for the first time see the section Configuring Additional Ethernet Controllers Configuring an Etherne...

Страница 97: ...stics to verify the setup If using Western Digital mode specify a shared memory base address to be used during diagnostics Also to guard against conflicts exit Diagnostics and check that any EMM386 entries in the CONFIG SYS file and SYSTEM INI file if using Windows both exclude the memory assignment to the Ethernet controller The default memory exclusion range is DC00 EFFF If the system does not p...

Страница 98: ...e Ethernet controller base memory For instance if the Ethernet controller shared memory selected is 16 Kbytes and is located at DC00h when you finish using AUTOSET include the following statement in the CONFIG SYS file device c dos emm386 exe x dc00 dfff other parameters For Microsoft Windows include the following statement in the 386Enh section of the SYSTEM INI file EMMExclude dc00 dfff Note tha...

Страница 99: ... turn the EPC on 2 Modify the EXM configuration data using the BIOS setup screen 3 Invoke the AUTOSET program and select Display Change Configuration 4 Manually select an available I O base address 5 Specify the other configuration options for this Ethernet controller 6 Run Diagnostics to validate the configuration options 7 Save the configuration then exit the AUTOSET program Repeat this procedur...

Страница 100: ...tware has several associated error messages that may display during operation These error messages are explained below Out of memory error This message displays only during development and should never display during normal operation If this message displays contact RadiSys Technical Support No adapter at this address This message displays when the address selected does not have an attached Ethern...

Страница 101: ...the Ethernet controller This is a fatal hardware error Contact RadiSys Technical Support Incorrect PROM ID Byte This message displays when there is a hardware problem in the EEPROM I O mode is thus disabled Contact RadiSys Technical Support xfer to memory xfer from memory Failed after X bytes with X These messages display if there is a problem during the Buffer Memory test The first two messages h...

Страница 102: ...T on Large Systems If you are using AUTOSET on a system with more than eight 8 EXM slots you must use a switch when starting AUTOSET to tell it how many slots are present For example on a system with 20 EXM slots enter the following AUTOSET 20 ...

Страница 103: ...led on the EXM expansion interface Display Drivers and Utilities The SVGA Driver and Utilities Software is supplied by Chips and Technologies and has the following nomenclature where X is the version number Windows 3 x Product DR655XX Software Revision 3 3 3 Document Release Date April 7 1997 Windows 95 Product DR655XX Software Revision 2 0 3 Document Release Date June 3 1997 Drivers for other ope...

Страница 104: ...on process Please review the driver product section below for specific instructions prior to running the installation program Windows 95 installation Follow standard procedures for installing new drivers under Windows 95 For detailed instructions please see the Display drivers section of this manual Windows 3 x installation The installation utility is located on the diskette labeled VGA Disk 2 of ...

Страница 105: ...elete old files the drop down box for Setup soon becomes very cluttered with different versions of the same files Also in many cases the old files were overwritten by newer ones so they no longer exist anyway Installing Windows 3 1 display drivers To install the Windows 3 1 drivers from the DOS prompt 1 Ensure that Windows 3 1 is already installed on your computer 2 From your Windows directory at ...

Страница 106: ...hanges do not take effect until Windows restarts Microsoft Windows 95 Driver Installation Procedure 1 Click Start then Settings then Control Panel 2 Start the Display applet program 3 Click the Settings tab then click the Change Display Type button 4 Click the Change button in the Adapter area 5 Click the Have Disk button then click the OK button 6 Specify the path to the new driver and press the ...

Страница 107: ...sk 1 of 2 in the A floppy drive and enter A The Select Device dialog box appears 8 Select the adapter that corresponds to the one you installed in your machine and click the OK button Windows OSR2 copies the display drivers to the proper directories on your system Continue choosing Close until asked to restart your machine from the Systems Settings Change dialog box After the system restarts you c...

Страница 108: ...EPC 8A Hardware Reference 98 ...

Страница 109: ...deo adapter If necessary try the monitor on another system to verify that the monitor is good Subplane failure or other hardware failure with or without onboard video Call RadiSys Technical Support EPC 8A cannot talk to EXM expansion interface Call RadiSys Technical Support System fails at power up does not run power on self test May be accompanied by combinations of beep tones from the speaker Th...

Страница 110: ...oes not talk across VMEbus The VMEbus backplane may not be jumpered correctly See the section Installing the VMEbus Backplane Jumpers in Chapter 2 More than 1 master may be set to provide Slot 1 functions Make sure that only 1 system is configured as the Slot 1 controller and that it is the left most system in the chassis There may be no Slot 1 controller providing bus arbitration Determine if the...

Страница 111: ... one partition is set active Diskette drive A error or Diskette drive B error Problem The floppy diskette s installed in the system do not match the configuration information listed in the BIOS setup screen This may be due to incorrect entries in the BIOS setup screen or one or both drives may not be responding at power up Solution s Run the BIOS setup program Make sure the BIOS setup entries rela...

Страница 112: ...lities supplied by your operating system Incorrect Drive A type run SETUP Incorrect Drive B type Run SETUP Problem Type of floppy drive A or B not correctly identified in BIOS Setup Solution s Run BIOS Setup and validate correct settings Also see Diskette drive A error above Invalid drive specification Problem You are trying to access a logical drive For example A B that is not known to the operat...

Страница 113: ...em This can also occur if the hard disk is partitioned and one partition is set active but the partition does not contain the operating system files Non system disk or disk error Replace and press any key when ready Problem This is caused by an attempt to boot from a disk or diskette that is not recognized as a system disk that is no system files exist on the disk or diskette Solution s Most often...

Страница 114: ...ETUP Problem Something in the nonvolatile CMOS RAM is incorrect It has been corrupted or modified incorrectly possibly by an application program that changes stored data in CMOS Solution s Run the BIOS setup program to determine what is wrong and correct it If the error occurs repeatedly the EPC 8A s battery has failed System battery is dead Replace and run SETUP Problem The CMOS clock battery ind...

Страница 115: ...e distribution diskettes are loaded onto the system use a text editor to modify the AUTOEXEC BAT file entering these commands at the end of the file ne2000 o0 run ne2000 d to display available options netx com provided by network software or operating system distribution diskettes The NE2000 COM driver supplied on the EPC 8A distribution diskettes is preconfigured for use with the Ethernet 802 3 i...

Страница 116: ...e The ATLANTIC COM driver is used for the ODI interface in 16 bit Western Digital mode and 16 bit NE2000 mode The ODI interface does not support IRQ15 NDIS Driver for DOS Installation The NDIS ethat2 driver is used for 16 bit Western Digital mode and 16 bit NE2000 mode for the NDIS interface It is used by various protocol stacks and applications such as Windows for Workgroups WFW NDIS 3 0 protecte...

Страница 117: ...diskettes netx com supplied with network software or operating system For NE2000 REM ATDrive i software interrupt b I O Base q IRQ n ATDrive i 60 b 240 q 5 n ipxpkt com supplied with EPC 8A distribution diskettes netx com supplied with network software or operating system Windows NT Driver Installation This section explains how to use the NE2000 driver provided with Windows NT to access the networ...

Страница 118: ...EPC 8A Hardware Reference 108 ...

Страница 119: ...ut 39 81 Bus Timer function 6 39 byte order 40 byte ordering 40 79 byte swapping 40 79 C cache 30 chassis 9 Chips and Technologies VGA GD5428 93 web site 94 CMOS backup 26 RAM 11 34 restore 26 setup 102 setup parameters 34 COM1 27 COM2 24 27 Commander 77 configuration options 6 85 configuration registers 41 82 Configuring a Single EXM 10 86 Configuring Additional EXM 10 89 connectors 59 convention...

Страница 120: ...51 IACK 6 7 39 IACK daisy chain 6 39 IackIn 8 IackOut 8 ID register 81 insertion 9 Installation 5 Interrupt 88 acknowledge 49 79 81 acknowledge cycle 41 acknowledge signal 7 assignments 24 generator register 41 mapping 57 reset 80 interrupts 47 IPX 105 106 IRQ10 interrupt 80 81 J J1 connector 9 39 J2 connector 39 jumpers 6 8 9 100 K keyboard 10 keyboard connector 60 keyboard errors 102 L LEDs 76 l...

Страница 121: ...n arbitration 74 Run 35 S SBER bit 42 selftest 76 serial port 59 Servant 77 setup parameters 34 Setup screen 11 27 shadowing 32 Shock 3 Signal register 77 Signal register FIFO 78 80 SIMMs 31 63 slave boards 8 Slot 0 arbitration 74 timeout 81 Slot 1 100 controller 5 6 8 39 100 jumper 6 soft reset 37 76 81 specifications 63 SRST bit 34 37 status ID 41 Sticky BERR 42 subplane 7 65 66 67 68 69 70 supp...

Страница 122: ...ping 39 43 interface 39 74 interrupt handler 4 interrupter 4 interrupts 80 master data transfer 4 requester 4 slave data transfer 4 slots 7 specifications 3 system controller 4 timeout duration 39 VXI device type 4 manufacturer code 4 model code 4 protocols 4 registers 41 82 W warm boot 37 warm reset 34 50 Watchdog timer 81 web sites Chips and Technologies 94 Western Digital mode 105 106 107 Windo...

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