![background image](http://html2.mh-extra.com/html/racal-instruments/7064/7064_instruction-manual_3127022024.webp)
line should be held low (configured as a buffer), then the
0/Ix!
LAT/BUFFx!
OPERATION
0
0
Buffered Input
0
I
Clocked Input
1
0
Output With Read Back
1
1
Not Recommended
data latched on the output can be read back with a read
from the VXlbus. This allows bit operations which modify
a single bit, leaving the other bits in a port unchanged.
Table 3-1 correlates the two control lines to their operation:
Table 3-1
1
NOTE
These two control lines do not have to be static. They can be connected to data pins
on an output port, or they can be connected to some user control lines. This allows
ports to be used for bidirectional communication, or other more complex functions.
There is one line that is used as a clock line, where x is the associated port number (0 to
11):
• T h e CLKINx line:
Used to clock data into the port when the port is configured
as a clocked input. A rising edge on this line clocks data
into the port. Once clocked in, the data can be read over
the VXlbus. I f the port is configured as a buffered input,
this line has no affect on the port operation.
NOTE
The 7064 breadboard is shipped with no jumpers on the port control lines. This
makes the default port configuration a buffered input. Drawing number 50-0010-000,
Sheets 6 to 11, show the pin numbers for each one of the three configuration lines
per port.
3-3
Содержание 7064
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