Smart LTE Module Series
SC600Y&SC600T Hardware Design
SC600Y&SC600T_Hardware_Design 65 / 128
Table 19: Pin Definition of SPI Interfaces
Pin Name
Pin No
I/O Description
Comment
SPI_CS
58
DO
Chip selection signal of SPI interface
Can be multiplexed
into UART6_CST.
SPI_CLK
59
DO
Clock signal of SPI interface
Can be multiplexed
into UART6_RTS.
SPI_MOSI
60
DO
Master out slave in of SPI interface
Can be multiplexed
into UART6_TXD.
SPI_MISO
61
DI
Master in salve out of SPI interface
Can be multiplexed
into UART6_RXD.
FP_SPI_CS
203
DO
Chip selection signal of SPI interface
Used for fingerprint
identification by
default. Can be
multiplexed into I2S
interface.
FP_SPI_CLK
250
DO
Clock signal of SPI interface
FP_SPI_MOSI
249
DO
Master out slave in of SPI interface
FP_SPI_MISO
251
DI
Master in salve out of SPI interface
3.17. ADC Interfaces
SC600Y&SC600T provide two analog-to-digital converter (ADC) interfaces, and the pin definition is
shown below.
Table 20: Pin Definition of ADC Interfaces
Pin Name
Pin No.
I/O Description
Comment
PMI_ADC
153
AI
General purpose ADC
interface
Maximum input voltage: 1.5V.
PMU_MPP2
151
AI
General purpose ADC
interface
Maximum input voltage: 1.7V.
The resolution of the ADC is up to 15 bits.
3.18. Vibrator Drive Interface
The pin definition of vibrator drive interface is listed below.
