Smart LTE Module Series
SC600Y&SC600T Hardware Design
SC600Y&SC600T_Hardware_Design 55 / 128
UART5_RTS
245
DO
UART5 request to send
SPI_MISO
61
DI
UART6 receive data
SPI interface pin by default.
Can be multiplexed into
UART6_RXD.
SPI_MOSI
60
DO
UART6 transmit data
SPI interface pin by default.
Can be multiplexed into
UART6_TXD.
SPI_CS
58
DI
UART6 clear to send
SPI interface pin by default.
Can be multiplexed into
UART6_CTS.
SPI_CLK
59
DO
UART6 request to send
SPI interface pin by default.
Can be multiplexed into
UART6_RTS.
UART5 is a 4-wire UART interface with 1.8V power domain. A level translator chip should be used if
customers’ applicat
ion is equipped with a 3.3V UART interface. A level translator chip TXS0104EPWR
provided by Texas Instruments is recommended.
The following figure shows a reference design.
VCCA
VCCB
OE
A1
A2
A3
A4
GND
B1
B2
B3
B4
LDO5_1P8
UART 5_ RTS
UART5_ RXD
UART5_ CTS
UART5_ TXD
RXD_3.3V
CTS_3.3V
TXD_3.3V
VDD_3.3V
TXS0104 EPWR
C1
100pF
C2
U1
100 pF
RTS_3.3V
Figure 14: Reference Circuit with Level Translator Chip (for UART5)
The following figure is an example of connection between SC600Y&SC600T and PC. A voltage level
translator and a RS-232 level translator chip are recommended to be added between the module and PC,
as shown below: