LTE-A Module Series
EG18 Hardware Design
EG18_Hardware_Design 49 / 104
The USB enumeration scenario is illustrated by the following figure.
USB_VBUS
STATUS
Inactive
Active
USB
≥200ms
≥525ms
Enumeration
procedure
Figure 23: Timing of USB Enumeration
The following principles of USB interface should be complied with, so as to meet USB 2.0 and USB 3.0
specifications.
It is important to route the USB 2.0 & 3.0 signal traces as differential pairs with total grounding. The
impedance of
USB differential trace is 90Ω.
For USB 2.0 signal traces, the trace length should be less than 120mm, and the differential data pair
matching should be less than 2mm (15ps).
For USB 3.0 signal traces, the maximum length of each differential data pair (TX/RX) is
recommended to be less than 100mm, and each differential data pair matching should be less than
0.7mm (5ps).
Do not route signal traces under crystals, oscillators, magnetic devices, PCIe and RF signal traces. It
is important to route the USB differential traces in inner-layer of the PCB, and surround the traces
with ground on that layer and with ground planes above and below.
If a USB connector is used, please keep the ESD protection components as close to the USB
connector as possible. Pay attention to the influence of junction capacitance of ESD protection
components on USB data traces. Typically, the capacitance value of ESD protection componetns
should be less than 2.0pF for USB 2.0, and less than 0.4pF for USB 3.0.
If possible, reserve a 0
Ω resistor on USB_DP and USB_DM lines respectively.
“*” means under development.
NOTE