LTE Standard Module Series
EC25 Mini PCIe Hardware Design
EC25_Mini_PCIe_Hardware_Design 29 / 79
1.
AT+IPR
command can be used to set the baud rate of the main UART, and
AT+IFC
command can be
used to set the hardware flow control (hardware flow control is disabled by default). Please refer to
document [2]
for details.
2.
“*” means under development.
3.9. PCM and I2C Interfaces
EC25 Mini PCIe provides one Pulse Code Modulation (PCM) digital interface and one I2C interface.
The following table shows the pin definition of PCM and I2C interfaces that can be applied in audio codec
design.
Table 11: Pin Definition of PCM and I2C Interfaces
EC25 Mini PCIe provides one PCM digital interface, which supports 16-bit linear data format and the
following modes:
It is prohibited to be pulled up high
before startup.
5
COEX_UART_TX
DO
1.8V
LTE/WLAN&BT coexistence
transmitting signal.
It is prohibited to be pulled up high
before startup.
Pin Name
Pin No.
I/O
Power Domain
Description
PCM_CLK
45
IO
1.8V
PCM clock signal
PCM_DOUT
47
DO
1.8V
PCM data output
PCM_DIN
49
DI
1.8V
PCM data input
PCM_SYNC
51
IO
1.8V
PCM frame synchronization
I2C_SCL
30
DO
1.8V
I2C serial clock.
Require external pull-up to 1.8V.
I2C_SDA
32
IO
1.8V
I2C serial data.
Require external pull-up to 1.8V.
NOTES