Memory
Configuration
©
PHYTEC Meßtechnik GmbH 2006 L-668e_1
39
CF control register 1 is used to set the memory interface. The CF card
interface can operate in TruIDE mode if the register bit is set to 0. The
PXA270 controller's PCMCIA interface does not support TruIDE
mode. Therefore the /CF_PCE1 signal is linked with A11='0' and the
/CF_PCE2 signal is linked with A11='1'. Both signals are active
during 8-bit as well as 16-bit accesses. If register bit 0 is set to '0' then
the memory mode of the CF card is configured. This memory interface
is supported directly by the PXA270.
REG
ADDR
D7
D3
D2
D1
D0
CF1
0x30001002
Res Res
Res
Res
IDE/MEM
RW
R/W=0 R/W=0
R/W=0
R/W=0
R=1/W=1
Signal
Name
internal
Table 29:
CF Card Control Register 1
IDE/MEM
Setting this bit to "1" turns on the TrueIDE mode,
writing a "0" selects the memory mode.
The CF card settings for reset and RDY are made in CF control
register 2. With RESENA the reset can be activated. RDYENA
connects the RDY signal of the CF card to the controller signal
PWAIT. The RDY signal can be read on the RDY bit.
REG
ADDR
D7
D3
D2
D1
D0
CF2
0x30001004
Res
RDY RDYENA
RES_CF
RESENA
RW
R/W=0
R/W R/W R/W R=1
Signal
Name
xCF_RDY internal
X/CF_RES
ET
internal
Table 30:
CF Card Control Register 2
RESENA
Enables CF card reset (bit is always "1").
RES_CF
Activates the CF card reset.
RDYEN
Connects the RDY input with PWAIT.
RDY
Returns the state of the RDY signal.
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