Phytec phyCORE-PXA270, Руководство по оборудованию

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Memory Configuration
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PHYTEC Meßtechnik GmbH 2006 L-668e_1
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The IDE interface is separated from the data, address and control bus
by line driver circuits. The drivers for the data bus can be activated
with the signal IDEOE. IDEON activates the drivers for the address
and control signal outputs and IDEIN activates the drivers for the
input signals such as IRQ.
REG ADDR D7 D3 D2 D1 D0
IDE 3 0x20001006 Res Res IDEIN IDEON IDEOE
RW R/W=0 R/W=0 R/W R/W R/W
Signal
Name x/IDE_IN X/IDE_ON x/IDE_OE
Table 23: IDE Control Register 3
IDEOE Setting this bit turns on the data bus line drivers.
IDEON Setting this bit turns on the control and address
lines.
IDEIN Setting this bit turns on the input signals.
The IDE control register 4 is responsible for the supply voltage to the
IDE hard drive. The register bit 5 V/3 V is always set to 1 because the
hard drive runs with 5 V. If IDEPWR is set, then the 5 V supply is
connected to the hard drive. The IDE5V bit is set in response.
REG ADDR D7 D3 D2 D1 D0
IDE 4 0x20001008 Res IDE5V RES 5V/3V IDEPWR
RW
R/W=0 R R/W=0 R=1/W=1 R/W
Signal
Name Internal internal /IDE_5V
Table 24: IDE Control Register 4
IDEPWR Setting this bit turns on the 5 V supply voltage for
the IDE drive.
3V/5V This bit will always retunr a "1" because only a 5 V
supply voltage is permissible.
IDE5V Indicates that the 5 V supply voltage has been
turned on.