Phytec phyCORE-PXA255, Руководство по оборудованию

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Memory Configuration
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PHYTEC Meßtechnik GmbH 2004 L-657e_0
25
Control register 5 is reserved for MultiMediaCard2. Here the supply
voltage can be switched on and the access LED can be activated. The
register bits WP and DET return the card status.
REG ADDR D7-D4 D3 D2 D1 D0
CTRL 5 0x0c00000A Res WP DET LED MMC2PWR
RW R/W=0 R R R/W R/W
Table 12: PLD U6 Control Register 5
MMC2PWR Setting this bit turns on the supply voltage for the
MMC card 2.
LED Setting this bit turns on the access indication LED
for then MMC card on the Expansion Board.
DET If a MMC card is inserted in the socket then
reading this bit returns a "0", otherwise it is set to
"1".
WP If a MMC card is inserted in the socket that is write
protected then reading this bit returns a "0",
otherwise it is set to "1".
Control registers 6 and 7 contain the interrupt sources for the interrupt
input GPIO_7. In control register 6 the register bits are deleted by an
interrupt. If one of the 4 bits is 0 then a high-active interrupt is
generated on GPIO_7. The value 0xFF has to be written to this
control register after the interrupt has been serviced in order to allow
another interrupt. The interrupt control register 7 is used to free
individual interrupt inputs. If the current bit is set to 1, the interrupt
causes the bits in control register 6 to be deleted, otherwise this will
not occur. The interrupt sources correspond to the designations of
control register 7.
REG ADDR D7-D4 D3 D2 D1 D0
CTRL 6 0x0c00000C Res INT3 INT2 INT1 INT0
RW R/W=0 R/W R/W R/W R/W
CTRL 7 0x0c00000E Res INT
PM_5V INT
MMCDET INT
FF_RI INT
BT_DET
RW R/W=0 R/W R/W R/W R/W
Table 13: PLD U6 Control Registers 6 and 7