Test Instructions Mono Board SD5.31SL
EN 14
SD-5.31SL
5.
Table 5-12 NameTestpointWaveform
Figure 5-10 DA_XCK
Figure 5-11 DA_BCK
Figure 5-12 DA_DATA0
Figure 5-13 DA_LRCK
Figure 5-14 SPDIF
To switch the audio signal OFF, press the STOP button on the
front.
Without A/V board, the switching levels are as follows:
–
DA_DATA1,DA_DATA2 and DA_DATA3 switch between
low and high for pink noise. For sine, this is low.
–
DA_DATA0, DA_LRCK, DA_XLK and DA_BCK switches
between low and high for both pink noise and sine.
–
SPDIF switches between LOW and HIGH
Name
Testpoint
Description
DA_XCK F421
Audio
clock
DA_BCK
F822
Audio bit clock
DA_DATA0 pin 27/IC7800 Audio data
DA_LRCK
F825
Audio word
SPDIF
F821
Audio digital out
1
ch1
ch1 freq 18.5Mhz
CH1 1.00V= MTB 20.0ns ch1+
PM3380B
CL 36532043_057.eps
030603
1
ch1
CH1 1.00V = MTB 200ns ch1+
CH1: freq 2.31Mhz
PM3380B
CL 36532043_054.eps
030603
S T OP
1
ch1
CH1 1.00V= MTB 2.00us ch1+
PM3380B
CL 36532043_055.eps
030603
ch1 freq 255kHz
1
ch1
ch1 freq 48.1kHz
CH1 1.00V= MTB 10.0us ch1+
PM3380B
CL 36532043_056eps
030603
S TOP
1
T
ch1
CH1 2.00V= MTB 200ns ch1+
PM3380B
CL 36532043_079.eps
030603
Содержание SD-5.31SL
Страница 6: ...Directions for Use EN 6 SD 5 31SL 3 3 Directions for Use There is no DFU available ...
Страница 42: ...42 SD 5 31SL 7 Electrical Diagrams and PWB s Layout Bare Board Part 1 Top Side CL 36532043_32a eps 030603 ...
Страница 43: ...Electrical Diagrams and PWB s 43 SD 5 31SL 7 Layout Bare Board Part 2 Top Side CL 36532043_32b eps 030603 ...
Страница 45: ...Electrical Diagrams and PWB s 45 SD 5 31SL 7 Layout Bare Board Part 1 Bottom Side CL 36532043_33a eps 030603 ...
Страница 46: ...46 SD 5 31SL 7 Electrical Diagrams and PWB s Layout Bare Board Part 2 Bottom Side CL 36532043_33b eps 030603 ...
Страница 64: ...Revision List EN 64 SD 5 31SL 11 11 Revision List First release ...