26
5. SCAN CIRCUITS
MG5.1E
5.2 Frame Drive circuit
Personal notes
5.2
Frame Drive circuit
Figure 5-2
FB GEN
DRIVER
VERT
OUT
VERT
DRIVER
OUT
VERT
7
4
5
2557
100uF
+13V
-13V
3565
220R
3562
4R7
2565
100n
1
8
2511
100n
3554
100R
6550
7590
3595
33K
3592
330R
3593
1K
3594
100R
+15V
2557
100uF
VPUL
1511
VFB
VDRVP
1509-5
2567
470p
3572
100R
2564
470p
3551
1K8
2
3
1509-7
VDRV
2570
470p
3573
100R
2571
470p
3550
1K8
3583
1R
-13V
2559
100n
3585
10K
3563
220R
2558
68n
2822
220R
3824
220R
3826
220R
RED
YOKE
GREEN
YOKE
BLUE
YOKE
9
6
CL 96532100_090.eps
121199
Frame Drive from the Small Signal panel (FDRVP and VDRV)
is fed to the Frame Output IC 7550. (Figure 14) This circuit is
powered by a +13 volt supply connected to Pin 8 and a -13 volt
supply connected to Pin 6 which are supplied by the Line Drive
circuit. Pin 5 of 7550 provides drive for the the three Frame
yokes. Frame drive feedback from the return side of the yokes
is fed back to Pin 2 of 7550. Frame sync (VPUL) for the High
Voltage shutdown circuit is output on Pin 4 of the IC. Output
from Pin 7 is buffered by transistor 7590 to produce a Frame
Sync pulse (VFB) for the Small Signal panel.
A failure in this circuit would cause the High Voltage to shut
down. A problem in this circuit could be caused by a loss of
drive from the Small Signal panel or a failure in the Line Sweep
circuit. An open Yoke connection would also cause the Frame
drive from the IC to shut down.