MG5.1E
6. SMALL SIGNAL PANEL
31
6.1 Block diagram
Personal notes
Figure 6-2
CL 86532047_002.eps
140798
5V2
MC44603
Blockdiagram supply-part
IC7520
+5V Standby
+5V Standby
7020
+t
+t
Rs
degaussing
Rp
1010
DCDC
convertor
M34063A
IC7556
TL431
14
1
3
10
7212
+8V6
7808
7213
+140
(Vbat)
7020
220V
start
3517/3520
7020
~
I2C bus.
In MG5.1E three different I2C busses are used:
1. Slow I2C bus (SCL/SDA-S); speed 100 kHz used for
various IC's
2. Fast I2C bus (SCL/SDA-F); speed 400 kHz. (In the OTC
there is only one hardware I2C bus. The two busses are
made by a very fast switch.)
3. I2C bus for NVM (SCL/SDA-NVM). This short I2C-bus is
used to avoid data corruption in the Non Volatile Memory.
Microprocessor = OTC2.5 (On screen display, Teletext and
Control, level 2.5 Txt) with integrated teletext (SAA5800). This
IC takes care of the analogue Input- and Output-processing.
The OTC, ROM and RAM are supplied with 3.3V. This voltage
is derived from the +5V Standby.