Philips 47PFL5403, Руководство по обслуживанию

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40 LC8.2A LA 6. Block Diagrams, Test Point Overview, and Waveforms
Supply Lines Overview
S UPPLY LINE S OVERVIEW
A
MAIN
POWER S UPPLY
B01A
DC / DC + 3 V 3 & +1V2 & +VTUN
B02
TUNER IF & DEMODULATOR
B05A AUDIO PROCE SS OR - MICRONA S
B05B AUDIO - CLA SS D
B06B I/0 - CINCH 1 & 2
B06C VGA & PC AUDIO & COMPAIR & UART
B07A HDMI S WITCH
B07B HDMI MAIN
B0 8 A
MJC MT 8 2 8 0 - LVD S
B0 8 B MJC MT 8 2 8 0 - DDR
B0 8 C MJC MT 8 2 8 0 - POWER
B01B DC/DC - 5V &1V 8 & 2V5
B04B DDR INTERFACE
B04C
FPGA INTERFACE
B04D FPGA I/O BANK S
B0 3 MICROPROCE SS OR
B04A TRIDENT - WX69
B04E
LVD S CONNECTOR
AB02 VIDEO-FLOW
AB0 3 CLOCK
AB05 FPGA: POWER + CONTROL
AB01 DC/DC
AB06 FPGA DFI
AB07 DDR A
AB0 8 DDR B
AB09 DI S PLAY-INTERFACING
AB10 FPGA AMBILIGHT
(RE S ERVED)
J IR & LED PANEL
CN6
1 1
6 6
7 7
2 2
3 3
4 4
5 5
8 8
S TANDBY
1P01
+ 3 V 3 _ S TBY
7P06-1 7P11
NCP5422
7P06-2
+ 3 V 3 _ S W
15
1
2
7P07-1
7P07-2
+1V2_ S W
5Q01
16
15
7P0 8
2V5
S TAB.
7P09
+2V5_ S W
+5V_ S W
+5V_ S W
S UP_A
S UP_D
+ 3 V 3 _ S W + 3 V 3 _ S W
5M01 + 3 V 3 _ANA_MUX
+12V_DI S P +12V_DI S P
7410
IN OUT
COM
+ 8 V
+ 3 V 3 _ S W + 3 V 3 _ S W
+1V 8 _ S W
+1V 8 _ S W
B04A
+5V_ S W +5V_ S W
+5V_ S W
+5V_ S W
+5V_TUN
3
P20
+ 3 V 3 _ S W + 3 V 3 _ S W
I_17760_066.ep s
040 3 0 8
CN4
1
2
3
4
5
6
24VA
S GND 3
24VA
S GND 3
24VA
S GND 3
3 . 3 V S B
P S ON
S GND1
S GND1
S GND1
12VA
12V
5P01
7Q06-1 7Q11
NCP5422
+12V_DI S P
7Q06-2
+5V_ S W
15
1
2
7Q07-1
7Q07-2
+2V6_ S W 5Q09
16
15
+12V_DI S P
3
Q20
5P09
+2V6_ S W +2V6_ S W
+2V5_VDDMQ 5D0 3
+ 3 V 3 _FPGA
+ 3 V 3 _FPGA
+1V2_ S W +1V2_ S W
+1V2-FPGA
FPGA_BL_BOO S T FPGA_BL_BOO S T
570 3
+1V2-PLL
+2V5_ S W +2V5_ S W
+2V5o u t_FPGA 5701
+2V5_in-FPGA
5702
+ 3 V 3 _ S W + 3 V 3 _ S W
+ 3 V 3 _FPGA 5700
+ 3 V 3 _ S TBY + 3 V 3 _ S TBY
CN7
1 1
6 6
7 7
2 2
3 3
4 4
5 5
8 8
BL_ON_OFF
1P02
BL_BOO S T
BL_ADJU S T_PWM
B04A
B0 3
12V
12V
S GND1
S GND1
BL-ON
S GND1
BL-DIM
BOO S T
+12V_DI S P
9 9
+12V_AUDIO
11 11
-12V_AUDIO
10 10
ONLY FOR ANALOG TUNER
+VTUN 5P06
6P0 3
+ 3 V 3 _ S W
7P14
B01 a
B01 a
B01 a
B01 b
B01 b
B01A
B01 a
B01 b
B01 a
B4 b
B01 a
B01 b
B01 b
B04d
B01 a
B01 a
B01 a
RE S
B4 a ,B05 b ,B06c, b
B01 a ,B02,
B0 3 ,B04e,B05 a
B05 b
B05 b
12V
12V
-12VA
S GND2
D ua l
O u t-of-Ph as e
S ynchrono us
B u ck Controller
D ua l
O u t-of-Ph as e
S ynchrono us
B u ck Controller
5P02
5Q02
7Q09
1V 8
S TAB.
7Q0 8
+1V 8 _ S W
+5V_IF
+5V S
3 1 33
3 1 3 4
3 141
5114
5115
5122
+ 3 V 3 _ S W + 3 V 3 _ S W
B01 a
+VTUN +VTUN
B01 a
+12V_DI S P +12V_DI S P
B01 a
+ 3 V 3 _ S W + 3 V 3 _ S W
B01 a
+ 3 V 3 _ S TBY + 3 V 3 _ S TBY
B01 a
+5V_ S W +5V_ S W
B01 b
+12V_DI S P +12V_DI S P
B01 a
+1V2_ S W
+1V2_ S W
+1V2_CORE
B01 a
+1V2_ADC
+1V2_PLL
5C09
5C10
5C11
+ 3 V 3 _ S W + 3 V 3 _ S W
B01 a
+ 3 V 3 _ S TBY + 3 V 3 _ S TBY
B01 a
+5V_ S W +5V_ S W
B01 b
+2V5_VDDMQ +2V5_VDDMQ
B04 b
DDR_VREF DDR_VREF
B04 b
FPGA_BL_DIMMING FPGA_BL_DIMMING
RE S
DDR_VREF
3 D15
1
1206
1205
1
+24V
5704
FPGA_BL_DIMMING FPGA_BL_DIMMING
RE S
+12V_DI S P +12V_DI S P
VDI S P 5R02
+ 3 V 3 _ S W + 3 V 3 _ S W
7R05
3 402
5401
5402
+12V_AUDIO
+12V_AUDIO
VDD
VDDA
B01 a
3 A01
5A07
5A05
-12V_AUDIO -12V_AUDIO
V SS
V SS A
3 A02
5A0 8
5A06
+5V_ S W +5V_ S W
+ 3 V 3 _ S TBY + 3 V 3 _ S TBY
B01 b
B01 a
DC_5V
1E01
9
VGA
CONNECTOR
+5V_ S W +5V_ S W
B01 b
6E04 5E01
3 E07
+ 3 V 3 _ S W + 3 V 3 _ S W
+ 3 V 3 _ S TBY + 3 V 3 _ S TBY
B01 a
B01 a
+1V 8 _ S W +1V 8 _ S W
+1V 8 _ANA-MUX 5M02
+1V 8 _DIG-MUX
5M0 3
B01 b
+5VHDMI_B
1M02
1 8
HDMI
CONNECTOR
(Option a l)
+5VHDMI_C
1M0 3
1 8
HDMI
CONNECTOR
+5VHDMI_ S IDE
1M01
1 8
HDMI
CONNECTOR
+5V_ S W +5V_ S W
B01 b
+ 3 V 3 _ S W + 3 V 3 _ S W
+ 3 V 3S WA
5N02
+ 3 V 3S WE 5N09
B01 a
+ 3 V 3S WB 5N0 3
+ 3 V 3S WC 5N07
+ 3 V 3S WD 5N0 8
+1V 8 _ S W +1V 8 _ S W
+1V 8S WA 5N01
+1V 8S WB 5N04
+1V 8S WC 5N05
+5VHDMI_A
1N0 3
1 8
HDMI
CONNECTOR
+5V_ S W
+5V_ S W
+5VHDMI_MUX_TPWR +5VHDMI_MUX_TPWR
+1V 8 _ S W +1V 8 _ S W
7F0 3
IN UT
COM
+0V9_VTT
B01 b
5F01
+1V2_ S W +1V2_ S W
7G04
IN OUT
COM
+1V
1
1F50
+12V- SS B
1F51
1
TO 1R01
SS B
B04E
+ 3 V 3 + 3 V 3
+1V2
+1V2
+1V2-PLL
+1V2-FPGA
5F54
5F55 5F5 3
+2V5 +2V5
5F24 +2V5o u t-FPGA
5F2 3 +Vin-FPGA
5F25 +2V5in-FPGA
+ 3 V 3 + 3 V 3
AB06
AB06
AB06
AB06
AB06
+VDI S P
TO
DI S PLAY
AB09
AB01
AB01
AB01
+VDI S P
+12V S
1M90
1
+12V
1U01
3 .0AT
5U05
+12V-DC
1U02
3 .0AT
5U06
5U07
+ 3 V 3
7U0 8
IN OUT
COM
7U09
IN OUT
COM
7U0 3 -1
D ua l
O u t-of-Ph as e
S ynchrono us
B u ck Controller
7U00
NCP5422
7U0 3 -2
+1V2
14
15
16
7U01-1
7U01-2
+2V5 5U01
1
2
3
U01
5U02
AB0 3 ,AB05,
AB06,AB09,
AB10
AB05,AB07,
AB0
8 ,AB10
AB05,AB10
TO 1M90
S UPPLY
AB09
AB01
5U04
+2V5o u t-FPGA +2V5o u t-FPGA
2V5-DDR2 2V5-DDR2
+1V2-FPGA
+1V2-FPGA
+Vin-FPGA +Vin-FPGA
+1V2-PLL +1V2-PLL
+2V5-DDR1 +2V5-DDR1
VREF-FPGA1 VREF-FPGA1
+2V5in-FPGA +2V5in-FPGA
VREF-FPGA2
VREF-FPGA2
+ 3 V 3 + 3 V 3
VREF-FPGA1
+2V5 +2V5
5F27
VREF-DDR1 5F2 8
+2V5-DDR1
3 F4B
3 F4D
VREF-FPGA2
+2V5 +2V5
5V01
VREF-DDR2 5V02
+2V5-DDR2
3 CD6
3 CD 8
+12V +12V
+VDI S P 5F0K
7F07
5F0L
5F0M
3 F4 8
+5V
+ 3 V 3 + 3 V 3
AB02
AB06
AB06
AB06
AB06
AB0 8
AB05
AB05
AB05
AB05
AB06
AB05
AB07
AB0 8
AB01
AB01
AB01
AB01
+ 3 V 3 + 3 V 3
+ 3 V 3 M
AB01
5F 3 1
+2V5 +2V5
+2V5M
AB01
5F 3 4
+1V2 +1V2
+1V2M
AB01
5F 33
+1V2-PF 9F52
AB01
5U00
RE S ERVED
1R01
41
TO 1F50
DFI
AB02
B01 b
B01 b
B01 a
B01 a
B01 a
B02,B0 3 ,
B04 a ,d,e,B06c,
B07 a , b ,B0 8a ,c
B04 a ,d,B0 8 c
B02
B02,B0 3 ,B04 a ,
B05 a , b ,B06 b ,c,
B07 b
B07 a , b ,B0 8b ,c
B04 a
B04 a
B04 a
B04d
TO
AMBI-LIGHT
UNIT
TO 1206
SS B
B04C
+ 3 V 3S TBY
1P10
5
+5V_ S W
8
TO 1 3 20
SS B
B0 3
1 3 20
8
TO 1P10
I/R LED
J
5
5704
B07 a
+5VHDMI_MUX_TPWR
3 M1 8
B07 b
GND S ND
CN5
1
2
3
4
+12V b
S GND 3
+12V b
S GND 3
TO 1m90
DFI
AB01
B0 3
(CONTROL)
(CONTROL)