30
6.
Block Diagrams, Test Point Overview, and Waveforms
Block Diagram Video
VIDEO
B2
TUNER IF & DEMODULATOR
B07A
HDMI
S
WITCH
B04A
TRIDENT - WX69
B04B
DDR INTERFACE
B07B
HDMI MAIN
B06C
VGA & PC AUDIO & COMPAIR & UART
B06A
YPBPR &
S
VH
S
B04E
LVD
S
CONNECTOR
AB02
VIDEO FLOW
AB0
8
DDR B
AB07
DDR A
AB06
FPGA DFI
AB02
VIDEO FLOW
AB0
3
CLOCK
B06B
I/O - CINCH 1 & 2
1
5
4
1102
S
IF1
S
IF2
VIF1
VIF2
1
2
17
CVB
S
DEMODULATOR
711
3
TDA9
88
6T/V4
IF_ATV
1101
UV1
3
16E/ABH
*
UV1
3
56/ABHN
TUNER
11
IF_OUT
3
CVB
S
_RF
EF
7114
1615
Y
Pr
Pb
Y
8
V6
W9
H_17740_057.ep
s
25010
8
HD_PR_IN
HD_Y_IN
HD_PB_IN
1C24
24MHz
W1
Y1
XTALI
7C01
WX69-7569-LF
7D01
EDD1216AJTA
S
DRAM
7D02
EDD1216AJTA
S
DRAM
Y_G1
PB_B1
PR_R1
Y4 CVB
S
1
S
OUND TRAP
S
4.5 to 6.5 Mhz
VIF-PLL
S
INGLE REFERENCE Q
SS
MIXER
INTERCARRIER MIXER AND
AM-DEMODULATOR
TUNER AGC
VIF AGC
TAGC
S
IF AGC
I2C-BU
S
TRAN
S
CEIVER
MAD
S
CL
S
DA
S
UPPLY
+5V
S
1
RF_AGC
DC_PWR
DIDITAL VCO COTROL
RC VCO
REF
38
MHz9
1
5
S
S
VH
S
2
4
3
1601
1602
S
VH
S
_Y_CVB
S
_IN
VIDEO
V9
C
Y6
Y_G
3
S
VH
S
_C_IN
S
IDE
I/O
CVI
2
1
5
4
8
7
11
10
5
8
57
62
61
66
65
70
69
HDMI_MUX_R
S
T
B4C
1
3
6
8
67
65
64
62
61
59
5
8
2
8
27
25
24
22
21
19
1
8
4
8
47
45
44
42
41
3
9
38
19
1
1
8
2
1
1M0
3
3
4
7
9
10
12
6
HDMI C
CONNECTOR
19
1
1
8
2
1
1M02
3
4
7
9
10
12
6
HDMI B
CONNECTOR
(Option
a
l)
1
1M01
3
4
7
9
10
12
6
1
1N0
3
3
4
7
9
10
12
6
TX2_A+
TX2_A-
TX1_A+
TX1_A-
TX0_A+
TX0_A-
TXC_A+
TXC_A-
19
1
1
8
2
HDMI (
S
IDE)
CONNECTOR
19
1
1
8
2
HDMI A
CONNECTOR
52
51
4
8
47
44
4
3
40
3
9
HDMI_
HDMI_MUX_TXC-
HDMI_
HDMI_MUX_TX0-
HDMI_
HDMI_MUX_TX1-
HDMI_
HDMI_MUX_TX2-
HDMI_
S
HDMI_
S
IDE_RX2-
HDMI_
S
HDMI_
S
IDE_RX1-
HDMI_
S
HDMI_
S
IDE_RX0-
HDMI_
S
HDMI_
S
IDE_RXC-
7M07
S
II91
8
5ACTU
HDMI
S
WITCH
WX69
VIDEO PROCE
SS
OR
R1X
R0X
R2X
TX
20
(I2C)
7N01
S
II9125CTU
HDMI
MAIN
HDMI_CR(0-9)
HDMI_Y(0-9)
HDMI_CB(0-9)
21
20
V20
Y19
HDMI_H
HDMI_V
5
19
Y20
W20
HDMI_DE
HDMI_VCLK
RX2_C+
RX2_C-
RX1_C+
RX1_C-
RX0_C+
RX0_C-
RXC_C+
RXC_C-
RX2_B+
RX2_B-
RX1_B+
RX1_B-
RX0_B+
RX0_B-
RXC_B+
RXC_B-
1
1E01
2
3
14
1
3
U
8
PC_R
VGA_R_IN
Y7
PC_G
VGA_G_IN
W10
PC_B
VGA_B_IN
V10
AIN_H
VGA_H
U10
AIN_V
VGA_V
1
6
10
11
5
15
VGA
CONNECTOR
DPA_H
S
DPA_V
S
DPB_DE
DPA_CLK
1
5
4
110
3
38
MHz9
*38
MHz
1
5
4
*
1105
*
ONLY FOR CHINA
38
MH
DYNAMIC FRAME IN
S
ERTION
AB05
FPGA: POWER +
CONTROL
1F51
LVD
S
CONNECTOR
TO DI
S
PLAY
1F52
5
4
3
9
40
49
50
1
3
2
2
1
VDI
S
P
1F50
10
11
12
1
3
14
15
17
1
8
20
21
22
2
3
25
26
27
2
8
3
9
3
0
3
2
33
3
5
3
6
3
7
38
40
7F1
8
EP2C
3
5F4
8
4C7N
CYCLONE II
FPGA
DFI
7CA0
EDD1216AJTA
DDR
S
DRAM 1
2Mx16
7CA1
EDD1216AJTA
DDR
S
DRAM 2
2Mx16
DQ2(0-15)
MM2-A(0-11)
(16-
3
1)
(0-12)
7CA2
EDD1216AJTA
DDR
S
DRAM
2Mx16
7CA
3
EDD1216AJTA
DDR
S
DRAM
2Mx16
DQ1(0-15)
MM1-A(0-11)
(16-
3
1)
(0-11)
LVD
S
CONNECTOR
TO DI
S
PLAY
RXEB-
RXEA+
RXED-
RXEE-
RXED+
RXOA-
RXEE+
RXOB-
RXOA+
RXOC+
RXOC-
RXOCLK-
RXOD+
RXOD-
RXOE+
RXOE-
RXOB+
RXEC+
RXECLK-
RXEB+
RXEC-
RXEA-
D2
D
3
E2
D1
E4
E1
F2
E
3
G5
F1
H4
G6
H2
G
3
L2
H1
J2
L1
H6
J1
C1
D4
C2
H5
S
DA-I2C4-DI
S
P
S
CL-I2C4-DI
S
P
1
2
3
4
+12V-
SS
B
41
S
CL-I2C4-
SS
B
S
DA-I2C4-
SS
B
7F
3
0
EPC
S
16
S
I16N
S
CD
7
16
15
C
3
L6
C4
n
S
CO
DCLK
A
S
DO
7F51
1
W4
SS
-OFF
CLK-
S
Y
S
TEM-
SS
50M
EOH
OUT
B12
3
Only for 100Hz Dyn
a
mic Fr
a
me In
s
ertion
TXFPGAe_2p
1R04
TXFPGAe_2n
LVD
S
CONNECTOR
TO DI
S
PLAY
OR
TXFPGAe_CLKp
1R05
TXFPGAe_CLKn
TXFPGAe_
3
p
1R06
TXFPGAe_
3
n
TXFPGAe_4p
1R07
TXFPGAe_4n
LTXFPGAo_0p
1R0
8
TXFPGAo_0n
TXFPGAo_1p
1R09
TXFPGAo_1n
TXFPGAo_2p
1R10
TXFPGAo_2n
TXFPGAo_CLKp
1R11
TXFPGAo_CLKn
TXFPGAo_TXo
3
p
1R12
TXFPGAo_TXo
3
n
TXFPGAo_TXo4p
1R1
3
TXFPGAo_TXo4n
TXFPGAe_0p
1R02
TXFPGAe_0n
TXFPGAe_1p
TXFPGAe_1n
1R0
3
A16
B16
A17
B17
A1
8
B1
8
A19
B19
A20
B20
C20
D19
D20
E19
E20
F19
F20
G19
G20
H19
A14
B14
A15
B15
1R01
6
5
4
10
9
7
14
1
3
12
17
16
15
21
20
19
25
24
22
29
2
8
27
3
2
3
1
3
0
38
41
40
3
9
VDI
S
P
TO 7700
FPGA
AMBI-LIGHT
(CONTROL)
B04D
HDMI_
S
HDMI_
S
IDE_RX2-
HDMI_
S
HDMI_
S
IDE_RX1-
HDMI_
S
HDMI_
S
IDE_RX0-
HDMI_
S
HDMI_
S
IDE_RXC-
RX2_B+
RX2_B-
RX1_B+
RX1_B-
RX0_B+
RX0_B-
RXC_B+
RXC_B-
RX2_C+
RX2_C-
RX1_C+
RX1_C-
RX0_C+
RX0_C-
RXC_C+
RXC_C-
15
1104
4M0
I_17760_062.ep
s
040
3
0
8
WX_MD
WX_MA
(16-
3
1)
(0-15)
(0-11)
(0-11)
10 BIT DUAL LVD
S
S
AW_
S
W
S
AW_
S
W
7109
B0
3
(CONTROL)
2
10
QUAD LVD
S
1920x10
8
0P
100/120Hz
XTALO
+1V2_CORE
+2V5_VDDMQ
+
3
V
3
_
S
W
+1V2_PLL
S
UPPLY
DDR_VREF
C14
B4
L16
D1
8
K
3
7C0
3
1
8
5
4
2
9
12
7
1504
VIDEO
OUT
1502
VIDEO
IN
W6
S
C2_Y_CVB
S
_IN
Y_G1
W2
S
C1_RF_OUT_CVB
S
OUT1
15
15
MEMORY
LVD
S
OUT
DIGITAL
VIDEO
ANALOG
VIDEO
750
3
7504
Содержание 47PFL5403
Страница 26: ...Service Modes Error Codes and Fault Finding EN 26 LC8 2A LA 5 Personal Notes E_06532_012 eps 131004 ...
Страница 43: ...Circuit Diagrams and PWB Layouts 43 LC8 2A LA 7 Layout Main Power Supply 42 Top Side H_16750_070 eps 110108 ...
Страница 44: ...44 LC8 2A LA 7 Circuit Diagrams and PWB Layouts Layout Main Power Supply 42 Bottom Side H_16750_071 eps 110108 ...
Страница 92: ...92 LC8 2A LA 7 Circuit Diagrams and PWB Layouts Personal Notes E_06532_013 eps 131004 ...