10.
Circuit Diagrams and PWB Layouts
SSB: PNX5100 - Power
C
COM
OUT
IN
V
SS
VDD_
3
V
3
_PER
V
SS
VDD_
3
V
3
_LVD
S
OUT
VDD_1V
8
_DDR
V
SS
VDD_
3
V
3
_LVD
S
IN
VDD_1V2_CORE
V
SS
V
SS
E
F
G
H
A
2C62-
3
C4
2C62-4 E
8
2C6
3
-1 C4
2C6
3
-2 C4
BD 12NC :
3
1
3
9_12
3
_644
33
MULTI 12NC :
3
1
3
9_12
3
_6442
3
CELL 12NC :
8
2
3
9_125_147
83
E
5
7
1
PNX5100 - POWER
FC
8
4 F
8
7
8
9
10
11
2C69-2 E
3
2C69-
3
E4
2C69-4 E4
2C6A B4
FC
83
E
8
FC
8
2 E
8
2
3
4
5
6
12
1
2
3
4
A
B
C
D
2C60-1 C2
2C60-2 C2
2C60-
3
C2
2C60-4 C
3
2C61-1 C
3
2C61-2 C
3
2C61-
3
C
3
2C61-4 C
3
2C62-1 C
3
2C62-2 E
8
2C
8
2 F
8
2C
83
G
8
2C
8
4 E10
2C
8
5 E10
2C6
3
-
3
F
8
B
C
D
E
F
G
H
2C55 E2
2C56 E2
4
1
B
10
9
2C67-
3
D4
2C67-4 D4
2C6
8
-1 E
3
2C6
8
-2 E
3
2C6
8
-
3
E
3
2C6
8
-4 E
3
2C69-1 E
3
12
1
3
2C70-1 E4
5
6
7
8
9
10
11
12
A
H
1
3
H
9
All right
s
re
s
erved. Reprod
u
ction in whole or in p
a
rt
s
2C57 E10
2C5
8
F10
2C59 B2
i
s
prohi
b
ited witho
u
t the written con
s
ent of the copyright
2C77 D10
2C7
8
-1 C2
2C7
8
-2 C2
2C7
8
-
3
C2
2C7
8
-4 E4
2C79 D7
2C
8
0 D
8
2C
8
1 C4
5C65 F7
5C66 D10
5C67 E10
5C6
8
E10
2C
8
6 E10
2C6
3
-4 C4
2C64 C4
2C65 C5
2C66-1 D
3
2C66-2 D
3
2C66-
3
D
3
2C66-4 D
3
2C67-1 D
3
2C67-2 D
3
I
6
I
7
F
" XC70
~
XC7Z "
C
11
G
FC61 G6
FC
8
0 D
8
2C70-2 E4
2C70-
3
E4
2C70-4 E4
2C71 F
3
2C72 F
3
2C7
3
F
3
2C74 F
3
2C75 F4
2C76 F4
F
2
G
D
E
B
6
" XC60
~
XC6Z "
5C6
3
E7
5C64 F7
FC90 F10
" XC90
~
XC9Z "
5C69 F10
2C
8
7 E10
2C
88
E10
2C
8
9 F10
2C90 F10
2C91 F10
2C92 F10
2C9
3
B2
2C94 F
8
2C95 B
3
J
8
3
2
" XC50
~
XC5Z "
4
3
FC60 B4
10
1
FC
8
1 E
8
owner.
A
2C96 B
3
2C97 B
3
2C9
8
B
3
2C99 B4
5C60 D7
5C61 E7
5C62 E7
D
C
J
8
12
11
" XC
8
0
~
XC
8
Z "
FC
8
5 F
8
FC
8
6 D10
FC
8
7 E10
FC
88
E10
FC
8
9 F10
5
5
5C70 F10
5C71 E2
5C72 E2
5C7
3
F2
7C00-10 C5
7C00-11 A
8
7C60 A
3
CC60 B4
2C61-4
100n
4
S
ETNAME
CHN
CLA
SS
_NO
1
S
UPER
S
.
3
NAME
DATE
CHECK
3
1
3
9 12
3
644
3
TV54
3
_2K9
PCB
S
B
SS
B BD
A
3
200
8
-10-07
-- -- --
2009-02-25
2
0
3
1
0
1
3
2
2009-01-16
Vincent Y
a
p / Lee CW
DC
3
94240
2009-06-1
8
S
V
****
***
*****
ROYAL PHILIP
S
ELECTRONIC
S
N.V. 200
8
200
8
-10-17
21
3
PC
33
2
25
********
FC
8
7
+1V2-PNX5100-DDR-PLL1
3
6
100n
2C
88
100n
2C66-
3
2C7
8
-2
100n
27
1
8
2C66-2
100n
27
100n
2C66-1
2C71
100n
2C
8
5
100n
+1V2-PNX5100-TRI-PLL
3
3
0R
5C6
3
FC
88
2C
8
0
100n
100n
2C
8
6
10
u
2C56
FC
8
6
FC
8
4
+1V2-PNX5100-TRI-PLL2
5C62
3
0R
2C75
100n
27
100n
2C
8
4
100n
3
100n
2C67-2
2C6
3
-
3
2C69-2
100n
27
1
8
100n
2C69-1
2C60-
3
100n
3
6
45
1
8
100n
2C60-4
27
100n
2C61-1
2C61-2
100n
2C99
22
u
+
3
V
3
+
3
V
3
+
3
V
3
+1V
8
-PNX5100
FC
8
2
FC
8
0
+1V2-PNX5100
CC60
2C77
100n
5
+
3
V
3
-PNX5100-DDR-PLL0
+
3
V
3
-PNX5100-CLOCK
2C69-4
100n
4
3
6
3
6
+1V2-PNX5100
100n
2C69-
3
100n
2C7
8
-
3
2C
8
7
100n
+1V2-PNX5100-TRI-PLL1
+1V2-PNX5100-DLL
3
0R
5C67
+
3
V
3
-PNX5100-LVD
S
-IN
2C9
8
100n
100n
2C5
8
2C
83
100n
2C
8
9
100n
1
3
2
7C60
LD1117DT1
8
+1V2-PNX5100
27
+1V2-PNX5100
100n
2C70-2
+
3
V
3
+1V2-PNX5100
+1V2-PNX5100
2C6
8
-1
100n
1
8
+1V2-PNX5100-DLL
3
0R
5C66
+1V2-PNX5100-LVD
S
-PLL
+1V2-PNX5100
FC90
FC
8
9
2C96
10
u
100n
2C92
2C91
100n
+1V2-PNX5100-CLOCK
+
3
V
3
-PNX5100-LVD
S
-PLL
10
u
2C6A
+1V
8
-PNX5100
V
SS
A_XTAL
AE12
V
SS
D_TRI_PLL1
J
3
V
SS
D_TRI_PLL2
K
3
V
SS
D_TRI_PLL
3
U
3
V
SS
_DDRPLL0
AD26
V
SS
_DDRPLL1
R22
V
SS
_MCAB1
AC1
3
V
SS
_MCAB2
AB1
3
V
SS
A_DLL4
E22
V
SS
A_DLL7
U22
V
SS
A_LVD
S
1
A15
V
SS
A_LVD
S
2
C15
V
SS
A_LVD
S
IN
AB19
V
SS
A_TRI_PLL1
J4
V
SS
A_TRI_PLL2
K4
V
SS
A_TRI_PLL
3
U4
VDDD_1V2_TRI_PLL
3
U5
VDD_1V2_DDRPLL0
AD25
VDD_1V2_DDRPLL1
N22
VDD_1V2_MCAB1
AB14
VDD_1V2_MCAB2
AC14
V
SS
A_DDRPLL1
T22
V
SS
A_DLL0
L22
V
SS
A_DLL1
AB22
VDDA_1V2_XTAL
AD1
3
VDDA_
3
V
3
_DDRPLL0
AE25
VDDA_
3
V
3
_LVD
S
1
B15
VDDA_
3
V
3
_LVD
S
2
D15
VDDA_
3
V
3
_LVD
S
IN
AB1
8
VDDA_
3
V
3
_
S
Y
S
_PLL
AD14
VDDD_1V2_TRI_PLL1
H5
VDDD_1V2_TRI_PLL2
K5
VDDA_1V2_DLL1
AA22
VDDA_1V2_DLL4
F22
VDDA_1V2_DLL7
V22
VDDA_1V2_LVD
S
_PLL
E15
VDDA_1V2_TRI_PLL1
J5
VDDA_1V2_TRI_PLL2
L5
VDDA_1V2_TRI_PLL
3
T5
VDDA_1V2_UIP_PLL
AF12
PNX5100E
Φ
S
UPPLY_2
VDDA_1V2_1_7_MCAB
AE14
VDDA_1V2_DDRPLL1
P22
VDDA_1V2_DLL0
M22
7C00-11
+
3
V
3
-PNX5100-CLOCK
100n
2C65
2C64
100n
45
100n
2C6
3
-4
1
8
100n
2C76
100n
2C7
8
-1
5C60
3
0R
3
6
+1V2-PNX5100-CLOCK
+1V2-PNX5100
+1V2-PNX5100
2C67-
3
100n
3
0R
5C70
2C74
100n
100n
2C7
3
FC
8
1
6.
3
V
33
0
u
2C59
27
100n
2C
8
1
100n
2C60-2
T14
T15
V25
W2
3
AE26
AC2
AC
3
AC4
+
3
V
3
R11
R12
R1
3
R14
R15
AC1
R2
3
R25
T11
T12
T1
3
N1
3
N14
N15
P11
AB5
P12
P1
3
P14
P15
P2
3
L14
L15
M11
M12
AB4
M1
3
M14
M15
M25
N11
N12
D
3
D4
E4
E5
AB
3
F25
H2
3
J25
L11
L12
L1
3
B1
A10
A1
3
AA25
A17
B2
A20
C2
C25
C
3
M5
N5
A1
AD1
AD2
AD24
AD
3
AE1
AE2
AF1
D17
D20
AB20
V5
W5
AB6
AB7
D22
E6
E7
G5
E16
L16
M16
N16
P16
R16
T16
AB15
AB17
D10
D1
3
P5
R5
Y5
AB16
AB
8
AB9
AC9
AD9
AE9
AF9
AA5
E
8
E9
F5
J22
K22
45
7C00-10
PNX5100E
S
UPPLY_1
Φ
100n
2C7
8
-4
+1V2-PNX5100-TRI-PLL1
+1V2-PNX5100
3
0R
5C61
5C65
3
0R
+1V2-PNX5100
+1V2-PNX5100
+1V2-PNX5100-LVD
S
-PLL
+1V2-PNX5100-CLOCK
2C57
FC61
10
u
100n
2C90
+
3
V
3
3
0R
5C69
+
3
V
3
+
3
V
3
-PNX5100-LVD
S
-IN
3
0R
5C71
100n
2C72
2C66-4
100n
45
2C67-1
100n
1
8
1
8
+1V2-PNX5100
+
3
V
3
-PNX5100-LVD
S
-PLL
4
2C6
3
-1
100n
2C62-4
100n
100n
2C62-
3
3
6
2C62-2
100n
2
3
6
45
100n
2C61-
3
1
8
100n
2C6
8
-4
100n
2C62-1
FC
83
2C94
100n
+1V2-PNX5100-DDR-PLL1
+1V2-PNX5100
100n
2C79
2C55
10
u
1
8
5C6
8
3
0R
2C60-1
100n
5
2C9
3
10
u
100n
2C70-4
4
+1V2-PNX5100-TRI-PLL
3
+
3
V
3
-PNX5100-DDR-PLL0
+1V2-PNX5100-DLL
+
3
V
3
F
+1V2-PNX5100-TRI-PLL2
3
0R
5C7
3
5C72
3
0R
45
10
u
2C97
100n
2C67-4
8
100n
2C
8
2
2C70-1
100n
1
3
0R
5C64
2C6
3
-2
27
+1V2-PNX5100
100n
FC60
3
6
2C6
8
-
3
100n
100n
2C6
8
-2
27
FC
8
5
2C70-
3
100n
3
6
10
u
2C95
S
EN
S
E+1V2-PNX5100
1
8
670_520_090911
.ep
s
090911
Содержание 40PFL8664H/12
Страница 48: ...IC Data Sheets EN 48 Q548 1E LB 8 2009 Dec 18 ...