10.
Circuit Diagrams and PWB Layouts
Pin strapping
1
8
750_605_100927.ep
s
100927
Pin
s
tr
a
pping
P02D
P02D
2010-06-16
2
2010-02-05
1
8
204 000 90
8
0
AV-PIP BROADCOM
RE
S
DDR0
S
IZE[0]
IFAG D
3
IFAH D
3
IFAJ E
3
IFAK E
3
IFB0 E4
IFB1 E4
INVERT EBI ADDRE
SS
PCI WIN1 ENABLE
EXTERNAL MPI ARBITER
NMI ACTIVE HIGH
1
NAND FLA
S
H TYPE MLC
PCI WIN2 ENABLE
IFA7 D4
IFA
8
D4
IFA9 D4
IFAE C
3
IFAF C
3
DDR CONFIG [0]
DDR CONFIG [1]
FLA
S
H
S
IZE [1]
DDR CONFIG [2]
PCI MODE CLIENT
16 BIT FLA
S
H
IF
83
B
3
IF
8
4 B
3
IF
8
7 C
3
IF
88
C
3
IF90 D
3
IF92 E
3
IF9
3
E
3
IF96 F2
IF97 F2
IF9
8
A4
IF99 A4
IFA0 B4
IFA1 B4
IFA2 B4
IFA
3
C4
IFA4 C4
IFA5 C4
IFA6 C4
6FA2 D
8
6FA
3
D
8
6FA4 B
8
7FA1-1 B7
7FA1-2 D7
IF
8
0 A
3
1
3
MIP
S
BIG ENDIAN
PCI WIN
S
IZE [1]
PCI WIN
S
IZE [0]
S
PI ENABLE B
S
C
CPU FREQ [2]
1
IF
8
1 A
3
IF
8
2 B
3
3
FC0 B5
3
FC1 B5
3
FC2 B5
3
FC
3
B5
3
FC4 B5
3
FC5 B5
ENABLE [1]
C
S
S
WAP
FLA
S
H TYPE(0=NOR / 1=NAND)
3
FC6 B5
3
FC7 B5
3
FC
8
C5
3
FC9 C5
3
FD0 C5
3
FD1 C5
3
FD2 C5
3
FD
3
C5
3
FD4 D5
3
FD5 D5
3
FD6 D5
3
FD7 D5
3
FD
8
D5
3
FD9 D5
3
FE0 D5
3
FE1 D5
3
FE2 E5
3
FE
3
E5
6FA1 B
8
3
FAC A
8
3
FAD D1
3
FB0 A5
3
FB1 A5
3
FB2 A5
3
FB
3
A5
DDR0
S
IZE[1]
U
S
B MODE CLIENT
3
FB4 E1
3
FB5 E2
3
FB6 F1
3
FB7 F2
3
FB
8
F1
3
FB9 F2
5
6
7
8
A
B
RE
S
ET EXTEN
S
ION
CLK
33
MHZ OUT
3
F95 C2
3
F96 C1
3
F97 C2
3
F9
8
D1
3
F99 D2
3
FA0 D1
3
FA1 D2
3
FA2 D1
3
FA
3
D2
3
FA5 D2
3
FA6 E1
3
FA7 E2
3
FA
8
E1
3
FA9 E2
3
FAA-1 A7
3
FAA-2 B7
3
FAA-
3
D7
3
FAA-4 C7
3
FAB C
8
3
F
8
9 B2
3
F90 B1
3
F91 B2
3
F92 C1
3
F9
3
C2
3
F94 C1
3
F
88
B1
DDR1
S
IZE[0]
DDR1
S
IZE[1]
CPU FREQ [1]
FLA
S
H
S
IZE [0 ]
ONE
S
HOT RE
S
ET
1
2
3
4
5
6
7
8
1
2
3
4
CPU FREQ [0]
ENABLE [0]
C
D
E
F
A
B
C
D
E
F
3
F
8
0 A1
3
F
8
1 A2
3
F
8
2 A1
3
F
83
A2
3
F
8
4 B1
3
F
8
5 B2
3
F
8
6 B1
3
F
8
7 B2
1K0
3
FAB
3
FAD
RE
S
4K7
IFA
3
IFA5
IFA4
4K7
3
FD6
IFAH
4K7
3
F9
3
RE
S
IFB0
IF97
IFB1
3
F
8
6
4K7
3
F92
+
3
V
3
4K7
IF
88
4K7
3
FA1
4K7
3
FB1
+
3
V
3
3
FB9
RE
S
3
FC5
4K7
RE
S
4K7
+
3
V
3
1K0
3
FAA-
3
3
6
3
FC
8
4K7
+1V
8
4K7
45
3
FC6
3
4
3
FAA-4
1K0
7FA1-2
BC
8
47B
S
(COL)
5
3
F
8
5
4K7
+1V2
IF
8
1
4K7
3
F90
4K7
3
F
8
1
RE
S
4K7
3
FB4
1
8
RE
S
2
6
1
1K0
3
FAA-1
BC
8
47B
S
(COL)
7FA1-1
RE
S
4K7
3
FA0
RE
S
3
FA2
4K7
33
0R
3
FAC
4K7
3
FC0
RE
S
3
FD
8
4K7
IFAG
4K7
3
FB
8
3
FB7
3
FAA-2
1K0
2
7
4K7
+
3
V
3
IF
8
0
4K7
3
FD2
6FA
3
LT
S
T-C190KGKT
IFA0
4K7
3
FC
3
3
FC2
RE
S
6FA4
LT
S
T-C190KGKT
4K7
IF99
4K7
RE
S
3
FC9
RE
S
3
FB
3
4K7
4K7
3
FD9
4K7
3
FE1
RE
S
IF90
RE
S
4K7
3
F9
8
6FA1
LT
S
T-C190KGKT
RE
S
4K7
3
FC1
4K7
3
FA5
3
FB5
4K7
4K7
3
FA7
4K7
RE
S
3
FA6
4K7
3
FE0
+5V
4K7
3
F99
3
F
8
0
+
3
V
3
RE
S
4K7
IFAF
4K7
3
FA
3
IFAJ
IF92
IF9
3
4K7
3
FA9
LT
S
T-C190KGKT
6FA2
IF
8
4
IFAE
4K7
3
F
88
RE
S
3
F95
4K7
RE
S
3
F96
4K7
4K7
4K7
3
F91
3
F94
RE
S
4K7
3
FD7
4K7
3
FB6
RE
S
4K7
3
F
8
9
IF96
IFAK
RE
S
RE
S
3
F
8
4
4K7
RE
S
3
FD5
4K7
IFA9
3
FD1
4K7
4K7
3
F
8
2
4K7
3
FD
3
RE
S
IF
8
2
IF
83
3
FB2
IF9
8
4K7
4K7
3
FC7
RE
S
RE
S
3
F
83
4K7
4K7
3
F97
RE
S
3
FD0
4K7
3
F
8
7
4K7
IF
8
7
RE
S
IFA
8
3
FA
8
4K7
3
FE2
4K7
RE
S
3
FC4
4K7
IFA1
IFA2
3
FE
3
4K7
3
FB0
4K7
RE
S
IFA6
RE
S
IFA7
3
FD4
4K7
AUD0-
S
PDIF
S
TRAP-BCH-ENABLE
VO-656-D7
U
S
B0-PWRON-N
RMX0-DATA
RMX0-
S
YNC
RMX0-CLK
EBI-T
S
IZE1
EBI-WE1-N
EBI-D
S
-N
EBI-ADDR24
EBI-RW-N
EBI-ADDR25
VO-656-D6
VO-656-D5
RMX1-
S
YNC
VO-656-D4
VO-656-CLK
RMX1-CLK
RMX1-DATA
EBI-ADDR26
EBI-ADDR27
EBI-T
S
IZE0
EBI-RD-N
VO-656-D0
VO-656-D
3
DAA-AOUT
VO-656-D1
VO-656-D2
EBI-WE0-N
EBI-T
S
-N
IR-OUT