11-16
U7
(TUNER)
1
NU
2
VCC
3
RF-AGC
11
AIF
7
NU
8
NU
9
SCL
10
SDA
12
NU
13
NU
14
NU
15
GND
16
GND
6
NU
17
GND
18
GND
5
NU
4
NU
0.1
C423
10
C418
L1211
1uH
0.1
C179
10
C178
+5VFE
1
2
3
4
5
SAW FILTER
GND GND
U8 (SAW FILTER)
0.1
C177
4.7K
R55
CM1
10/16V
A+3.3V-BCM3411
1n
C183
0.1
C184
0.1
C181
1n
C185
1
C187
1n
C186
1n
C188
1
C189
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
VGA0
VGA1
PGA
PGA- VDD1
BG-VDD
VGA1-VDD
VGA0-VDD
DEFAULT-B
NU
NU
NU
NU
NU
NU
NU
NU
NU
NU
NU
NU
NU
U9
BCM3411
R478
0
R619
0
0.1
C194
0.1
C203
L2
68nH
180P
C199
27P
C195
27P
C204
27P
C202
27P
C196
L1
220nH
L4
220nH
120P
C197
120P
C205
L3
470nH
27P
C198
27P
C402
27P
C403
AH28
U1(3/10)
*1
BCM3549L
DS-AGCT-CTL
AE27
AE28
AG28 DS-AGCI-CTL
510
R62
200
R68
0.1
C206
0.1
C207
2K
R69
0.01
C208
3.9K
R71
3.9K
R67
AGC-VDDO
0
R70
0
R59
0.1
C191
200
R64
0.1
C200
2K
R66
0
R65
0.01
C201
0
R61
0.1
C193
1.1K
R58
MMBT3904L
Q3
Q4
MMBT3906L
47K
R57
1
C190
470n
C586
0
R49
Q1
RK7002
G
S
D
3.3K
R46
R50
0
3.3K
R48
33
R56
39P
C180
BSC-M0-SCL
Q2
RK7002
G
S
D
R54
0
BSC-M0-SDA
3.3K
R47
3.3K
R44
33
R51
39P
C182
FB20
600
FB22
600
FB21
600
FB19
600
510
R63
MMBT3904L
Q5
RF-AGC-SW
0
R60
0.1
C192
2K
R45
2
3
1
4
P
M
O
Q
N
(IF AMP)
(BUFFER)
(BUFFER)
(SWITCHING)
(BUFFER)
(BUFFER)
DEMODULATOR
/MPEG DECODER
SMART MODULE CBA
CONTINUE
SMART MODULE 6
CONTINUE
SMART MODULE 4
CONTINUE
SMART MODULE 11
DIGITAL SIGNAL PROCESS
/SMART PORT CONTROLLER
DIGITAL
SIGNAL
PROCESS
TO SMART
MODULE 2
U1(2/10)
TO SMART
MODULE 1
U1(1/10)
TO SMART
MODULE 2
U1(2/10)
TO SMART
MODULE 8
U1(6/10)
TO SMART
MODULE 14
U1(9/10)
R
Smart Module 3 Schematic Diagram
A17FYSCSM3
The order of pins shown in this diagram is different from that of actual U1.
U1 is divided into ten and shown as U1 (1/10) ~ U1 (10/10) in this Smart Module Schematic Diagram Section.
1 NOTE: