10-3
3. Digital Signal Process Block Diagram
DIGIT
AL MAIN CB
A UNIT
IC3003
(DIGIT
AL SIGNAL PR
OCESS)
CN3901
LL
V1(+)
21
LL
V1(-)
20
LL
V0(+)
23
LL
V0(-)
22
LL
V2(+)
19
LL
V2(-)
18
LL
V3(+)
13
LL
V3(-)
12
LL
V4(+)
11
LL
V4(-)
10
LL
V5(+)
9
LL
V5(-)
8
LL
VCLK(+)
16
LL
VCLK(-)
15
TP
6
POL
5
CPV
4
OE1
3
STV
1
P14
P13
N16
N15
P16
P15
T16
R14
R13
T13
T14
T15
R16
R15
L13
M15
L16
L15
M14
B4
A4
B3
A3
B2
A2
B1
A1
LVDS TX
DIGIT
AL
SIGNAL
PR
OCESS
A
UDIO I/F
T
O
VIDEO/A
UDIO
BLOCK DIA
GRAM
AMP
(R)-OUT
AMP
(L)-OUT
A7
B7
D
A
T
A(0-15)
SDDQ(0-15)
ADDRESS(0-12)
SD
A(0-12)
IC3002
(DDR2 SDRAM)
A
UDIO
DECODER
HDMI
I/F
VIDEO
DECODER
VIDEO SIGNAL
AUDIO SIGNAL
TP
POL
CPV
OE
STV
LCD MODULE
ASSEMBL
Y
HDMI-D0(+)
HDMI-D0(-)
HDMI-D1(+)
HDMI-D1(-)
HDMI-D2(+)
HDMI-D2(-)
HDMI-CLOCK(+)
HDMI-CLOCK(-)
A17FYBLD