V1553B UserÕs Manual
Chapter 2 Functional Description
Jumper J20 : 1553 Channel 2B - Coupling Mode
Setting
Description
1-2
Long Stub
2-3
Short Stub
Jumper J21 : 1553 Channel 2 XFMR A Center Tap
Setting
Description
Present
Center Tap grounded
Absent
Center Tap floating
Jumper J22 : 1553 Channel 2 XFMR B Center Tap
Setting
Description
Present
Center Tap grounded
Absent
Center Tap floating
2.2.1 Internal Interface Description
Each BU61580 contains 4k words of shared RAM. This RAM can be accessed by either the BU61580 or the
VME master processor. For a detailed description of the internal workings of the BU61580 see the "BU61580
BC/RT/MT ADVANCED COMMUNICATION ENGINE 'ACE'Ó data sheet from Data Device Corporation.
2.2.2 External Interface Description
The V1553B connects to the VMEbus via the P1 backplane. The base memory address is jumper programmable.
Table 2.2.3a shows an address map of the V1553B.
Table 2.2.3a VME Address Map
Address
Function
XXXX XXXX XX00 0000 0000 0000
Base Address - see J8
Base + 0000 (hex)
VME Configuration Reg. (word)
Base + 0002 (hex)
1553 Configuration #1 Reg. (word)
Base + 0004 (hex)
1553 Configuration #2 Reg. (word)
Base + 1000 - 103E (hex)
BU61580 #1 Config. Reg. (word)
Base + 2000 - 3FFE (hex)
BU61580 #1 Shared Ram (word)
Base + 5000 - 503E (hex)
BU61580 #2 Config. Reg. (word)
Base + 6000 - 7FFF (hex)
BU61580 #2 Shared Ram (word)
June 22, 1998
© 1996 PEP Modular Computers Page 2-7
