CP302
Functional Description and Configuration
ID 21112, Rev. 05
Page 2 - 40
®
PEP Modular Computers GmbH
2.9.8
Logic Version
The logic version register may be used to identify the logic status of the board by
software. It starts with the value 0 and will be incremented with each logic update.
I/O location 0x28B
2.9.9
PCI Interrupt Routing
This register is used by the CPU to control the PCI interrupt routing. Every interrupt line
of the backplane can be enabled or disabled. The interrupt mask register bits enable the
appropriate bits when low, and disable them when high. The default configuration is “all
interrupts enabled”.
The I/O location for the PCI interrupt routing is 0x28C.
Table 2-31: Logic Version
Bits
Type
Default
Function
7-0
R
--
Logic version
0 = Index 0000
Table 2-32: PCI Interrupt Routing
Bits
Type
Default
Function
7-4
R
--
Reserved
3
RW
0
P1 INTD
2
RW
0
P1 INTC
1
RW
0
P1 INTB
0
RW
0
P1 INTA
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