3DQDVRQLF
36
Chapter
3
EURO 4H Supplement
3.
COLOUR OUTPUT STAGE
The Y-Board (TNP8EY018), contains not only the
colour output stage, but also scan velocity modulation
stage.
The RGB signals fed to the colour output stage are fed
from the DDP IC1504 pins 24 (R out), 25 (G out), 26
(B out), here the RGB signals is fed from the F-Board
via connector F1 pins 6, 7 and 8 to the E-Board via
connector E70. On the E-Board the RGB signals is fed
directly to connector E8 pins 3, 4 and 5 to the Y-Board
via connector Y2. The RGB signals at this point being
approximately 5Vpp.
The velocity modulated (VM) signal which is a
combined RGB signal, is output from the DDP IC1504
via pin 23 and is fed to the E-Board via connectors F1,
E70 pin 9 and then directly to the Y-Board via
connectors E8, Y2 pin 7.
3.1. Velocity Modulation circuit
The SVM signal which is fed via connector Y2 is fed
to the base of transistor Q905, where with capacitor
C906 and resistor R914 signal shaping occurs.
The signal is then fed from here to two mirror image
push pull output stages which are used to supply the
required current to the velocity modulation coils.
Transistors Q906 and Q907 are connected as
impedance converters which control the output stage
at low impedance without distortion.
Transistors Q908 and Q909 then output the signal at
approximately 35Vpp to the SVM coil, (connected
between connector Y5 pins 1 and 3), which is
controlled directly via the collector terminals of
transistors Q908, Q909 via resistor R929 which is
coupled in parallel to the deflection winding.
3.2. CRT AMPLIFIER STAGE
3.2.1. Outline
In order to avoid damage caused by long cathode
lines and there by trim the frequency response, the
RGB output stages have once again been mounted
on the CRT board. Each colour channel has an IC with
a signal bandwidth of > 10MHz guaranteeing high
resolution even with rapid signal transitions in both
directions. The circuits for the three colour channels
being identical. The use of ICs means that the number
of components in the output stages can be reduced
to a minimum.
The RGB signals mentioned earlier are fed via
connector Y2 pins 3, 4, and 5 where the signals are
fed to pin 3 of IC351, IC361, IC371 and then the
inverting input of an operational amplifier via an R/C
combination. The non-inverting input and thus the
operating point is determined via pin 1. The negative
feedback to determine the amplification factor is
provided by the resistance between pin 9 and pin 3.
The signals are output at approxromately 160Vpp
maximum via pins 7 and 8 to drive the CRT cathodes.
The actual drive signal being output from pin 8 and a
correcting signal input via pin 7 is used in order to allow
automatic dark current regulation.
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