Panasonic CQ-C8352N, Руководство по обслуживанию

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Pin
No.
Port Descriptions I/O (V)
77 CLK
MD1
Clock mode setting (L
fixation) I 0
78 CLK
MD2
Clock mode setting (H
fixation) I 3.1
79 CLK
MD3
Clock mode setting (L
fixation) I 0
80 HPI60 /
(NC)
No Connection - -
81 SW2 Mechanics deck SW2
input I 0.2
82 TOUT(NC)No Connection - -
83 EMU0 - - 3.1
84 EMU/
OFF
- - 3.1
85 TDO - - 0
86 TDI - - 3.1
87 /TRST - - 0
88 TCK - - 3.1
89 TMS - - 3.1
90 CVSS8 GND - 0
91 CVDD5 CORE CPU system (1.6V)
power supply - 1.6
92 HPIENA GND I 0
93 DVSS6 GND - 0
94 CLKOUT No Connection - -
95 CLKENA Oscillation output Cainabl
signal
O 0
96 X1 Crystal Connection O 0.7
97 X2/
CLKIN
Crystal Connection I 1.0
98 RS Reset signal input I 3.1
99 D0 Data base of FLASH ROM I/O 0
100 D1 I/O 0
101 D2 I/O 0
102 D3 I/O 0
103 D4 I/O 0
104 D5 I/O 0
105 A16 Address bus of FLASH
ROM O 3.1
106 DVSS7 GND - 0
107 A17 Address bus of FLASH
ROM O 3.1
108 A18 Address bus of FLASH
ROM O 0
109 A19 TP419 O 0
110 A20 TP416 O 0
111 CVSS9 GND - 0
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