Y108540-8
Service Manual
4-7
4.6
RESET CIRCUIT
T
he following four operations generate the reset signal:
•
External reset input via RESET pin.
•
Internal reset by watching timer program loop detection.
•
Internal reset by comparison of supply voltage and detection voltage of power-on-clear (POC) circuit.
•
Internal reset by comparison of supply voltage and detection voltage of low-power-supply detector (LVI).
The external and internal resets have no functional differences. In both cases, program execution starts at the
address at 0000H and 0001H when the reset signal is generated.
Reset by POC and LVI circuit power supply detection is automatically released when V
DD
>
V
POC
or
V
DD
>
V
LVI
after the reset, and program execution starts using the internal high-speed oscillation clock
See the Reset function Block Diagram below.
Fig. 4-4
Содержание ECR 6800
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