OKIDATA DOC-IT3000, Руководство по обслуживанию

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Service Guide DOC-IT3000/4000
Chapter 2 Principles of Operation
Block Diagram of Serial Interface
The input and output of serial data using this circuit are controlled by a serial clock signal. The
most significant bit of a shift register is output to the serial data (OPSD) pin at the falling edge of a
serial clock (OPSC) pin level when the serial data is output. After that, the contents of the shift
register are shifted one bit at every falling edge of the serial clock pin level and output to the serial
data pin.
The serial data pin latches data at the rising edge of a serial clock pin level when the serial data is
input. After that, the serial data is sent to the shift register at every rising edge of the serial clock
pin level.
Internal and external clock modes are available as a serial clock source. These modes are
selected by mode register setting.
If the internal clock mode is selected, the internal clock selected using a START command is
supplied to the serial interface as a serial clock to control the input and output of serial data and
output from the OPSC pin. The operation stops when the internal clock is output from the OPSC
pin by eight pulses. The output signal at the OPSC pin is then kept high.
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