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Chapter 3 Setup and Operation
Page 3-5
3.1.3 Clock Selection Switch (OSCSEL)
This switch specifies the source for the ML670100 operating clock, supplied to the
OSC0 pin: the built-in oscillator circuit or the user application system.
Figure 3.5.
Clock Selection Switch (OSCSEL)
Setting this switch to its SYSTEM position connects the ML670100 OSC0 pin to the 6-
MHz clock signal from the built-in oscillator circuit. It also drives the ML670100 FSEL
and PLLEN pins at "H" level to quadruple the internal frequency to 24 MHz.
The USER position, in contrast, connects all three pins to the corresponding user
interface connector pins.
Figure 3.6 shows the related circuitry.
Figure 3.6.
Clock Selection Switch (OSCSEL) Circuits
USER
SYSTEM
OSCSEL
Oscillator circuit
(6MHz)
OSCSEL
SYSTEM
USER
+3.3V
+3.3V
USER_OSC
(CNU4 pin25)
USER_FSEL
(CNU4 pin29)
USER_PLLEN
(CNU4 pin30)
OSC0
FSEL
PLLEN
100 k
Ω
100 k
Ω
ML670100
Содержание ML670100
Страница 16: ...Chapter 1 Read Me First Page 1 12...
Страница 79: ...Chapter 4 User Interface Page4 12...
Страница 91: ...Chapter 5 Notes on Debugging Page 5 12...
Страница 92: ...Chapter 6 Appendices...