FEAL60852A-02
1
Semiconductor
ML60852A
15/39
2.5.
Isochronous Transfer
2.5.1.
Outline of isochronous transfer
Isochronous transfer is used to transfer data such as voice data for which the real-time performance
takes precedence. The priority of this transfer is high and data with a certain size can be cyclically
transferred. In order to allow high reliability communication, USB standards devised isochronous
transfers in which bandwidth reservation takes precedence over error control.
In isochronous transfer, however, no handshake (ACK/NAK) is provided, so occurrence of CRC errors
is not reported to the sender and re-transmit is not performed. To re-transmit the packet that resulted in
an error, an original protocol should be formulated.
In the ML60852A, in 5EP mode, EP4 is available and in 6EP mode, EP4 and EP5 are available for
isochronous transfer. For these end points, the transfer direction can be individually specified. The
FIFO size of EP4 in 5EP mode is 512 bytes. In 6EP mode, the FIFO size of EP4/EP5 is 256 bytes.
EP4 used in isochronous transfer (or EP4 and EP5 in 6EP mode) allows DMA transfer. The FIFO of
EP4 (or EP4 and EP5 in 6EP mode) has a 2-layer configuration, and it is possible to increase the transfer
efficiency because one layer can be accessed by the local MCU when the other layer is exchanging data
with the USB bus.
Table 5 Registers used during isochronous transfer
Function
Register name
Bits
SOF interrupt status
INTSTAT2
D0
SOF interrupt enable
INTENBL2
D0
Configuration
EP( )CONF
D0/D1/D4/D7
End point control
EP( )CONT
D0/D3
Maximum packet size (LSB)
EP( )PLDLSB
D7 to D0
Maximum packet size (MSB)
EP( )PLDMSB
D1 to D0
Receive byte count (LSB)
EP( )RXCNTLSB
D7 to D0
Receive byte count (MSB)
EP3RXCNTMSB
D1 to D0
Transmit/receive FIFO
EP( )RXFIFO/EP( )TXFIFO
D7 to D0
Note: In the register name column, ( ) is a substitute for each number of the end points that are used for
this transfer.