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NXP Semiconductors
S32K3X4EVB-Q257 | S32K3X4EVBQ257ND
HWUM
Hardware User Manual
S32K3X4EVB-Q257 HWUM
All Information provided in this document is subject to legal disclaimers
© NXP B.V. 2020. All rights reserved
NXP Semiconductors
REV B
– 9/2021
Page
34
of
36
J31
1-2
VDD_HV_B is routed to VDD_HV_B_MCU reference. A jumper on this position
disables the shunt resistors R74 and R75 are disabled for current measurement
proposals.
J37
2-3
The VDD_HV_B domain is routed to the collector terminal in order to supply the
NPN external Ballast transistor for V15_MCU domain
J360
5-6
The NPN external Ballast transistor is selected to supply the V15_MCU domain.
J375
1-2
VDD_HV_B is routed to VDD_HV_B_PERH
J374
1-2
VDD_HV_A is routed to VDD_HV_A_PERH
J410
1-2
VDD_HV_A_MCU is routed to VDD_REFH
User
Peripherals
J670
1-2
PTE0 is routed to the ARDUINO shield connectors
J671
2-3
PTA9 is routed to the ARDUINO shield connectors
J321
1-2
VDD_HV_A_PERH is routed to VDD_IO
LIN
Interface
J390
1-2
LIN1 Physical layer
– LIN1 is enabled
J674
3-4
INH function is routed to LIN1 pullup circuitry for Master configuration
J678
1-2
LIN2 Physical layer
– LIN2 is enabled
J679
3-4
INH function is routed to LIN2 pullup circuitry for Master configuration
CAN
Interface
J413
1-2
CAN0 Physical Layer is enabled. VBATP_SW is routed/turning-ON the TJA1153
-U55
J672
1-2
CAN1 Physical Layer is enabled. VBATP_SW is routed/turning-ON the TJA1153
-U64
Figure 33. S32K3X4EVB-Q257 | S32K3X4EVBQ257ND
– Default jumpers’ configuration