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NXP Semiconductors
S32K3X4EVB-Q257 | S32K3X4EVBQ257ND
HWUM
Hardware User Manual
S32K3X4EVB-Q257 HWUM
All Information provided in this document is subject to legal disclaimers
© NXP B.V. 2020. All rights reserved
NXP Semiconductors
REV B
– 9/2021
Page
10
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36
7.2 S32K3X4EVB-Q257
– FS26/Modes Operation
Figure 5. S32K3X4EVB-Q257 | S32K3X4EVBQ257ND
– FS26/Modes Operation
Table 3. S32K3X4EVB-Q257
– FS26/Modes Operation
Reference
Jumper Position
Description
Comments
Flash Mode
[Default
configuration]
J686
1-2
The R1961 resistor to VBATP (VBAT
pro12.0V) is routed as pull-up to the
VDEBUG Pin. This is a common pull-up
resistor for the 2 voltage divider
configurations, with R1971 or R1963.
J685
1-2
The R1963 is selected for the divider
voltage, +8.0V is applied on VDEBUG pin to
set the FS26-SBC on MCU Flash Mode. In
this mode device power up sequence starts
with debug mode enabled and can be used
during customer production process to flash
MCU without need of WD refresh. After
~80ms once the SW10 is in ON-.position the
VDEBUG pin will be switching to a low
voltage (GND) due to the RC delay circuitry
and Q18
Debug
Mode
J686
1-2
The R1961 resistor to VBATP (VBAT
pro12.0V) is routed as pull-up to the
VDEBUG Pin. This is a common pull-up
resistor for the 2 voltage divider
configurations, with R1971 or R1963.
J685
2-3
The R1963 is selected for the divider
voltage, +5.0V is applied on VDEBUG pin to
set the FS26-SBC on Debug Mode, voltage
must be removed from debug pin in order to
start power up sequence. In this mode
Watchdog refresh is not needed. After
TP281
TPAD
Q18
BC846B
2
3
1
VBATP_SW
R2022
5.1K
J685
HDR 1X3
SILK = FS26VDBG_SEL
JUMPER(Default) = 1-2
1
2
3
J686
HDR1X2
SILK = FS26VDBG_PU
JUMPER(Default) = 1-2
1
2
C3851
10uF
R1961
10K
D99
MMSZ8V2T1G
A
C
R1971
15K
GND
R1968
0
0402
C3847
0.1uF
0402
R1967
100k
R1969
33K
R1963
33K
FS26_VDEBUG
VBATP
FS26_VDEBUG
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