NXP Semiconductors MPC5746R, Техническое описание

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Table 61. Revision history
Revision Date Description of changes
• LVD_SD
• HVD_SD
• Corrected Voltage detector threshold crossing assertion Unit.
In section Flash memory program and erase specifications , Table 30 :
• Removed parenthetical phrase from table title.
• Made overall updates to spec values.
• Removed footnote 7.
In section Flash memory Array Integrity and Margin Read specifications , Table 31 :
• Removed parenthetical phrase from table title.
• Made overall updates to spec values.
In section Flash memory module life specifications , Table 32 , removed parenthetical phrase from
table title.
In section Flash memory AC timing specifications , Table 33 , removed parenthetical phrase from
table title.
Added section Flash read wait state and address pipeline control settings .
In section Power management integration , Table 28 , changed the footnotes for t
TCYC
Min values to
have the same footnote number as they were identical.
In section DSPI timing with CMOS and LVDS , Table 39 , LVDS (Master mode) specification:
changed Max usuable frequency to 40 MHz (was 33 MHz).
In section DSPI CMOS master mode – classic timing :
• Added NOTE.
• In
Table 40 , changed PCS strobe timing values.
In section DSPI CMOS master mode – modified timing :
• Added NOTE.
• In
Table 41 , changed PCS strobe timing values.
In section DSPI LVDS master mode – modified timing , Table 42 , changed significant digits for some
values.
In section DSPI master mode – output only :
• Modified format paragraphs leading the tables. Removed NOTE.
• In
Table 43 , changed the t
CSV
strong drive value and t
HO
LVDS value.
• In Table 44 , changed significant digits for some values.
In section FEC timing , corrected the title of MII-lite and RMII serial management channel timing
subsections.
In section MII-lite transmit signal timing (TXD[3:0], TX_EN, TX_ER, TX_CLK) , Table 47 , modified
footnote for output parameters.
In section RMII serial management channel timing (MDIO and MDC) , added Note on reference for
timing specifications.
In section RMII transmit signal timing (TXD[1:0], TX_EN) , Table 52 , modified R6 max value.
In section UART timings , Table 53 , removed 100 MHz specification.
"Package drawings" section renamed to Obtaining package dimensions , with package drawing
document numbers to search at the Freescale website. Drawings removed from this document.
In section Thermal characteristics :
• Added table for 144 LQFP.
Table continues on the next page...
Revision history
SPC5746R Microcontroller Data Sheet, Rev. 6, 06/2017
94 NXP Semiconductors