NXP Semiconductors MKW01Z128, Справочное руководство

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offset into the space based at 0x4000_0000 for peripheral. The "-" indicates an address
bit "don't care". Note, unlike the other decorated load operations, UBFX uses addr[19] as
the least significant bit in the "w" specifier and not as an address bit.
The decorated unsigned bit field extract read operation is defined in the following
pseudo-code as:
rdata = ioubfx<sz>(accessAddress) // unsigned bit field extract
tmp = mem[accessAddress & 0xE007FFFF, size] // memory read
mask = ((1 << (w+1)) - 1) << b // generate bit mask
rdata = (tmp & mask) >> b // read data returned to core
Like the BFI operation, when the starting bit position plus the field width exceeds the
container size, only part of the source bit field is extracted from the destination memory
location. Stated differently, if (b + w+1) > container_width, only the low-order
"container_width - b" bits are actually extracted. The cycle-by-cycle BME operations are
detailed in the following table.
Table 13-7. Cycle definitions of decorated load: unsigned bit field extract
Pipeline Stage Cycle
x x+1 x+2
BME AHB_ap Forward addr to memory;
Decode decoration; Capture
address, attributes Idle AHB address phase <next>
BME AHB_dp <previous> Perform memory read; Form
bit mask; Form (rdata & mask)
and capture destination data
in register Logically right shift registered
data; Return justified rdata to
master
13.3.3 Additional details on decorated addresses and GPIO
accesses
As previously noted, the peripheral address space occupies a 516 KB region: 512 KB
based at 0x4000_0000 plus a 4 KB space based at 0x400F_F000 for GPIO accesses. This
memory layout provides compatibility with the Kinetis K Family and provides 129
address "slots", each 4 KB in size.
The GPIO address space is multiply-mapped by the hardware: it appears at the "standard"
system address 0x400F_F000 and is physically located in the address slot corresponding
to address 0x4000_F000. Decorated loads and stores create a slight complication
involving accesses to the GPIO. Recall the use of address[19] varies by decorated
operation; for AND, OR, XOR, LAC1 and LAS1, this bit functions as a true address bit,
while for BFI and UBFX, this bit defines the least significant bit of the "w" bit field
specifier.
Chapter 13 Bit Manipulation Engine (BME)
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
Freescale Semiconductor, Inc. 245