• the FTM counter and the prescaler counter are zero and are stopped (CLKS[1:0] =
00b);
• the timer overflow interrupt is zero, see
• the channels interrupts are zero, see
;
• the fault interrupt is zero, see
;
• the channels are in input capture mode, see
• the channels outputs are zero;
• the channels pins are not controlled by FTM (channel (n) ELSB:ELSA = 0:0)
(
).
The following figure shows the FTM behavior after the reset. At the reset (item 1), the
FTM counter is disabled (see the CLKS its in the register SC), its value is updated to zero
and the pins are not controlled by FTM (
).
After the reset, the FTM should be configurated (item 2). It is necessary to define the
FTM counter mode, the FTM counting limits (MOD and CNTIN registers value), the
channels mode and CnV registers value according to the channels mode.
Thus, it is recommended to write any value to CNT register (item 3). This write updates
the FTM counter with the CNTIN register value and the channels output with its initial
value (except for channels in output compare mode) (
The next step is to select the FTM counter clock by the CLKS[1:0] bits (item 4). It is
important to highlight that the pins are only controlled by FTM when CLKS[1:0] bits are
different from zero (
).
(1) FTM reset
0x0016
0x0015
0x0014
0x0013
0x0011
. . .
0x0010
0x0018
0x0017
XXXX
0x0000
0x0012
FTM counter
CLKS[1:0]
channel (n) output
(4) write 1 to SC[CLKS]
(3) write any value
to CNT register
(2) FTM configuration
channel (n) pin is controlled by FTM
NOTES:
– CNTIN = 0x0010
– Channel (n) is in low-true combine mode with CNTIN < C(n)V < C(n+1)V < MOD
– C(n)V = 0x0015
00
XX
01
Figure 39-112. FTM behavior after reset when the channel (n) is in Combine mode
The following figure shows an example when the channel (n) is in Output Compare mode
and the channel (n) output is toggled when there is a match. In the Output Compare
mode, the channel output is not updated to its initial value when there is a write to CNT
Reset overview
Kinetis KE1xZ256 Sub-Family Reference Manual, Rev. 3, 07/2018
1002
NXP Semiconductors
Содержание Kinetis KE1xZ256
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