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DA70131-1/3E
VII-2
2-3. Register access command
Some registers have been added that were not in the G9001.
These are not seen in the memory map so they can only be accessed using commands.
Register name
Write
command
Read
command
Detail
RENV0
5500h
6500h
Environment setting register
RERCNT
-
6501h
Error counting register
RSYCNT
―
6502h
Elapsed cyclic time register
RDJADD
-
6503h
Device number latching register when data is received
normally
RVER
-
6504h
Version information
2-4. Register
2-4-1. RENV0 register
A 16-bit register for establishing the environment.
All bits are zero after a reset.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
MCLR BKOF
0
MCSE MERE MEDE MEIE MIOP MBRK MCED
Bit
Bit name
Details
0
MCED
By setting this bit to 1, the CEND interrupt is masked. The status register is
changed.
1
MBRK
By setting this bit to 1, the BRKF interrupt is masked. The status register is
changed.
2
MIOP
By setting this bit to 1, the IOPC interrupt is masked. The status register is
changed.
3
MEIE
By setting this bit to 1, the EIOE interrupt is masked. The status register is
changed.
4
MEDE
By setting this bit to 1, the EDTE interrupt is masked. The status register is
changed.
5
MERE
By setting this bit to 1, the ERAE interrupt is masked. The status register is
changed.
6
MCSE
By setting this bit to 1, the CAER interrupt is masked. The status register is
changed.
7
-
Always set this bit to 0.
8
BKOF
By setting this bit to 1, the auto break function will be disabled.
9
MCLR
Select the method for clearing the following status bits.
CEND, BRKF, EDTE, ERAE, CAER
0: Cleared by reading its status (default setting)
1: Not cleared by reading its status.
To clear the bit, use INT group status clear command
(04xxh).
15~10
-
Always set this bit to 0.
Содержание Motionnet G9001A
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Страница 67: ...DA70131 1 3E III 1 III Connection Examples and Recommended Environments G9000 Series...
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