NSB–6
System Module
PAMS Technical Documentation
Page 27
Issue 1 06/2000
E
Nokia Mobile Phones Ltd.
used for the sleep mode timing. The sleep clock is active when there is a
battery voltage available i.e. always when the battery is connected.
MAD2WD1 supply voltages are VBB and VCORE (V2V), VBB feed I/O
pins so that MAD2WD1 is externally fully compatible with old versions.
VCORE feed MAD2WD1 internal fuctions supplyoltage; CPU, DSP and
system logic.
Pin
N:o
Pin Name
Pin
Type
Connected
to/from
Drive
req.
mA
Reset
State
Note
Explanation
A1
MCUGemIO 0
O
2
0
MCU General
purpose output
port
C2
LEADGND
Lead Ground
D2
Col4
I/O
UIF
2
Input
Program-
mable pullup
PR0201
I/O line for key-
board column 4
D3
Col3
I/O
UIF
2
Input
Program-
mable pullup
PR0201
I/O line for key-
board column 3
H11
MCUGenIO1
I/O
2
Input,
pullup
Pullup
PR0201
General purpose
I/O port
E4
GND
Ground
D4
Col2
I/O
UIF
2
Input
Program-
mable pullup
PR0201
I/O line for key-
board column 2
C4
Col1
I/O
UIF
2
Input
program-
mable pullup
PR0201
I/O line for key-
board column 1
C3
Col0
I/O
UIF
2
Input
program-
mable pullup
PR0201
I/O line for key-
board column 0
D1
LCDCSX
I/O
UIF
2
Input
external
pullup/down
serial LCD driver
chip select, par-
allel LCD driver
enable
E1
LEADVCC
Lead Power
F12
LoByteSelX
NC
E3
Row5LCDCD
I/O
UIF
2
Input,
pullup
pullup
PR0201
Keyboard row5
data I/O , serial
LCD driver com-
mand/data indi-
cator, parallel
LCD driver read/
write select
N4
VCC_CORE
Core VCC in
3325c10
Power
E2
Row4
I/O
UIF
2
Input,
pullup
pullup
PR0201
I/O line for key-
board row 4, par-
allel LCD driver
register selection
control