NSB–6
System Module
PAMS Technical Documentation
Page 44
Issue 1 06/2000
E
Nokia Mobile Phones Ltd.
Receiver
Receiver is a direct conversion, dualband linear receiver. Received RF–
signal from the antenna is fed via RF–antenna switch to 1st RX dualband
SAW filter and discrete LNAs (low noise amplifier), separate LNA
branches for EGSM900 and GSM1900. Gain selection control of LNAs
comes from HAGAR IC. Gain step is activated when RF–level in antenna
is about –40 dBm.
After the LNA amplified signal (with low noise level) is fed to bandpass
filter (2nd RX dualband SAW filter). RX bandpass filters defines how good
are the blocking characteristics against spurious signals outside receive
band and the protection against spurious responses.
These bandpass filtered signals are then balanced with baluns. Differen-
tial RX signal is amplified and mixed directly down to BB frequency in HA-
GAR. Local signal is generated with external VCO. VCO signal is divided
by 2 (GSM1900) or by 4 (EGSM900). PLL and dividers are in HAGAR–IC.
From the mixer output to ADC input RX signal is divided into I– and Qsig-
nals. Accurate phasing is generated in LO dividers. After the mixer DTOS
amplifiers convert the differential signals to single ended. DTOS has two
gain stages. The first one has constant gain of 12dB and 85kHz cut off
frequency. The gain of second stage is controlled with control signal g10.
If g10 is high (1) the gain is 6dB and if g10 is low (0) the gain of the stage
is –4dB.
The active channel filters in HAGAR provides selectivity for channels
(–3dB @ +/–91 kHz typ.). Integrated base band filter is active–RC–filter
with two off–chip capacitors. Large RC–time constants needed in the
channel select filter of direct conversion receiver are produced with large
off–chip capacitors because the impedance levels could not be increased
due to the noise specifications. Baseband filter consists of two stages,
DTOS and BIQUAD. DTOS is differential to single–ended converter hav-
ing 8dB or 18dB gain. BIQUAD is modified Sallen–Key Biquad.
Integrated resistors and capacitors are tunable. These are controlled with
a digital control word. The correct control words that compensate for the
process variations of integrated resistors and capacitors and of tolerance
of off chip capacitors are found with the calibration circuit.
Next stage in the receiver chain is AGC–amplifier, also integrated into HA-
GAR. AGC has digital gain control via serial mode bus from COBBA IC.
AGC–stage provides gain control range (40 dB, 10 dB steps) for the re-
ceiver and also the necessary DC compensation. One 10 dB AGC step is
implemented in DTOS stages.
DC compensation is made during DCN1 and DCN2 operations (controlled
via serial bus). Charging the large external capacitors in AGC stages to a
voltage which cause a zero dc–offset carries out DCN1. DCN2 set the
signal offset to constant value (RXREF 1.2 V). The RXREF signal (from
COBBA GJP) is used as a zero level to RX ADCs.
Single ended filtered I/Q–signal is then fed to ADCs in COBBA–IC. Input
level for ADC is 1.4 Vpp max.
