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Chapter 4

Connecting the Signals

NI 6052E User Manual

4-36

ni.com

Figures 4-28 and 4-29 show the input and output timing requirements for
WFTRIG.

Figure 4-28.

WFTRIG Input Signal Timing

Figure 4-29.

WFTRIG Output Signal Timing

UPDATE* Signal

Any PFI pin can externally input the UPDATE* signal, which is available
as an output on the PFI5/UPDATE* pin.

As an input, UPDATE* is configured in the edge-detection mode. You can
select any PFI pin as the source for UPDATE* and configure the polarity
selection for either rising or falling edge. The selected edge of UPDATE*
updates the outputs of the DACs. To use UPDATE*, you must set the DACs
to posted-update mode.

As an output, UPDATE* reflects the actual update pulse connected to
the DACs, even if the updates are externally generated by another PFI.
The output is an active low pulse with a pulse width of 300 to 350 ns.
This output is set to high-impedance at startup.

Rising-Edge

Polarity

Falling-Edge

Polarity

t

w

= 10 ns minimum

t

w

t

w

= 50 to 100 ns

t

w

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Содержание DAQ 6052E

Страница 1: ...DAQ NI 6052E User Manual Multifunction I O Devices for PCI PXI 1394 Bus Computers NI 6052E User Manual October 2002 Edition Part Number 370477C 01...

Страница 2: ...8 14 24 24 Germany 089 741 31 30 Greece 01 42 96 427 Hong Kong 2645 3186 India 91 80 4190000 Israel 03 6393737 Italy 02 413091 Japan 03 5472 2970 Korea 02 3451 3400 Malaysia 603 9596711 Mexico 001 800...

Страница 3: ...ons owner s modification of the product owner s abuse misuse or negligent acts and power failure or surges fire flood accident actions of third parties or other events outside reasonable control Copyr...

Страница 4: ...ruments could void the user s authority to operate the equipment under the FCC Rules Class A Federal Communications Commission This equipment has been tested and found to comply with the limits for a...

Страница 5: ...ncludes a DoC for most every hardware product except for those bought for OEMs if also available from an original manufacturer that also markets in the EU or where compliance is not required as for el...

Страница 6: ...Optional Equipment 1 6 Unpacking 1 6 Safety Information 1 7 Chapter 2 Installing and Configuring the NI 6052E Installing the Software 2 1 Installing the Hardware 2 1 Configuring the NI 6052E 2 3 Chap...

Страница 7: ...Ended Connection Considerations 4 17 Single Ended Connections for Floating Signal Sources RSE Configuration 4 18 Single Ended Connections for Grounded Signal Sources NRSE Configuration 4 18 Common Mo...

Страница 8: ...4 41 GPCTR1_GATE Signal 4 41 GPCTR1_OUT Signal 4 42 GPCTR1_UP_DOWN Signal 4 43 FREQ_OUT Signal 4 44 Field Wiring Considerations 4 44 Chapter 5 Calibration Loading Calibration Constants 5 1 Self Calibr...

Страница 9: ...ple ACH i and ACH i 8 The symbol leads you through nested menu items and dialog box options to a final action The sequence File Page Setup Options directs you to pull down the File menu select the Pag...

Страница 10: ...the NI PXI 6052E or the DAQPad 6052E unless otherwise noted NI PCI PXI 6052E Refers to either the NI PCI 6052E or the NI PXI 6052E Related Documentation The following documents contain useful informa...

Страница 11: ...ice to the PCI or PXI I O bus The MITE implements the PCI Local Bus Specification so that you can configure all the interrupts and base memory addresses with software Because the device has no DIP swi...

Страница 12: ...sampling rate change The NI 6052E uses the Real Time System Integration RTSI bus to synchronize multiple measurement functions to a common trigger or timing event The RTSI bus consists of the RTSI bu...

Страница 13: ...ion is not guaranteed between CompactPCI devices with different sub buses nor between CompactPCI devices with sub buses and PXI because the standard implementation for CompactPCI does not include thes...

Страница 14: ...e you can use NI application development environment ADE software or other ADEs In either case you use NI DAQ NI DAQ NI DAQ which shipped with the NI 6052E has an extensive library of functions that y...

Страница 15: ...DAQ hardware is included with LabVIEW Measurement Studio which includes LabWindows CVI tools for Visual C and tools for Visual Basic is a development suite that allows you to use ANSI C Visual C and...

Страница 16: ...rement Studio or VI Logger greatly reduces the development time for your data acquisition and control application Optional Equipment NI offers a variety of products to use with the NI 6052E including...

Страница 17: ...any way If the product is damaged return it to National Instruments for repair Do not substitute parts or modify the product except as described in this document Use the product only with the chassis...

Страница 18: ...cted internal MAINS derived circuits Installation Category II is for measurements performed on circuits directly connected to the low voltage installation This category refers to local level distribut...

Страница 19: ...lation Category IV is for measurements performed at the source of the low voltage 1 000 V installation Examples of Installation Category IV are electric meters and measurements on primary overcurrent...

Страница 20: ...Note It is important to install NI DAQ before installing the NI 6052E to ensure that the device is properly detected Installing the Hardware You can install the NI PCI PXI 6052E in any available PCI s...

Страница 21: ...ther devices or components and is fully inserted into the slot 9 Replace the cover 10 Plug in and power on the computer The NI PCI 6052E is now installed NI PXI 6052E 1 Power off and unplug the comput...

Страница 22: ...on Refer to the Configuring the NI 6052E section for information on LEDs 4 Configure the device and any accessories with NI DAQ The DAQPad 6052E for 1394 is now installed You are now ready to configu...

Страница 23: ...you determine the state of the device Power LED Off No power is provided to the device Either the power cord is unplugged or the power source is broken Dim The device is receiving power but it is not...

Страница 24: ...ion Mux Mux Mode Selection Switches Voltage REF Calibration DACs 8 Calibration DACs DAC0 DAC1 DAQ STC Analog Input Timing Control Analog Output Timing Control Digital I O Trigger Counter Timing I O RT...

Страница 25: ...A D Converter REF Buffer Programmable Gain Amplifier Calibration Mux Mux Mode Selection Switches Voltage REF Calibration DACs 8 Calibration DACs DAC0 DAC1 DAQ STC Analog Input Timing Control Analog O...

Страница 26: ...nipolar and bipolar Unipolar input polarity means that the input voltage range is between 0 and Vref where Vref is a positive reference voltage Bipolar input polarity means that the input voltage rang...

Страница 27: ...ion but can result in the input signal going out of range For best results match the input range as closely as possible to the expected range of the input signal For example if you are certain the inp...

Страница 28: ...00 to channel 1 When the multiplexer switches to channel 1 and the PGIA switches to a gain of 100 the new full scale range is 100 mV if the ADC is in unipolar mode The 4 V step from 4 V to 1 mV is 4 0...

Страница 29: ...y the DACs in the AO circuitry and can be either the 10 V onboard reference or an externally supplied reference within 11 V You do not need to configure both channels for the same range Selecting a bi...

Страница 30: ...ost PGIA trigger selection is the full scale range of the selected channel The resolution is that range divided by 4 096 Note The PFI0 TRIG1 pin is an analog input when configured as an analog trigger...

Страница 31: ...ng Mode In above high level analog triggering mode the trigger is generated when the signal value is greater than highValue LowValue is not used Figure 3 5 Above High Level Analog Triggering Mode In i...

Страница 32: ...ess than lowValue with the hysteresis specified by highValue Figure 3 8 Low Hysteresis Analog Triggering Mode The analog trigger circuit generates an internal digital trigger based on the AI signal an...

Страница 33: ...O lines Timing Signal Routing The DAQ STC provides a flexible interface for connecting timing signals to other devices or external circuitry The NI 6052E uses the RTSI bus to interconnect timing signa...

Страница 34: ...lained in Chapter 4 Connecting the Signals Programmable Function Inputs Ten PFI signals connect to the signal routing multiplexer for each timing signal and software can select any PFI pin as the exte...

Страница 35: ...the RTSI bus on the RTSI clock line This timebase is software configurable If you configure the device to use the internal timebase you can program the device to drive its internal timebase over the...

Страница 36: ...rigger lines These bidirectional lines can drive any of eight timing signals onto the RTSI bus and can receive any of these timing signals Figure 3 10 shows the PCI signal connection scheme Figure 3 1...

Страница 37: ...I 6052E to receive triggers from any Star Trigger controller plugged into slot 2 of the chassis For more information on the Star Trigger refer to the PXI Specification Revision 2 0 Figure 3 11 shows t...

Страница 38: ...e RTSI bus and can receive any of these timing signals This signal connection scheme is shown in Figure 3 12 Figure 3 12 NI DAQPad 6052E RTSI Bus Signal Connection Refer to the Connecting Timing Signa...

Страница 39: ...the signals are accessible through a removable screw terminal block Extra removable terminal blocks are available Besides the standard I O connections both versions of the DAQPad 6052E have RTSI and a...

Страница 40: ...ACH13 AIGND ACH4 AIGND ACH3 ACH10 AIGND ACH1 ACH8 DGND PFI8 GPCTR0_SOURCE PFI7 STARTSCAN GPCTR1_OUT PFI4 GPCTR1_GATE PFI3 GPCTR1_SOURCE PFI2 CONVERT DGND DGND DGND EXTSTROBE SCANCLK DIO3 DIO7 DIO2 DG...

Страница 41: ...references AIGND AOGND and DGND are connected on the device ACH 0 15 AIGND Input Analog Input Channels 0 through 15 You can configure each channel pair ACH i i 8 i 0 7 as either one differential input...

Страница 42: ...t or switched to another signal EXTSTROBE DGND Output External Strobe This output can be toggled under software control to latch signals or trigger events on external devices PFI0 TRIG1 DGND Input Out...

Страница 43: ...utput this is the WFTRIG signal In timed AO sequences a low to high transition indicates the initiation of the waveform generation PFI7 STARTSCAN DGND Input Output PFI7 Start of Scan As an input this...

Страница 44: ...d source set the switch to GS Refer to the Types of Signal Sources section for more information on single ended channels differential channels floating sources and grounded sources Figure 4 3 Floating...

Страница 45: ...0 V s DAC1OUT AO 0 1 Short circuit to ground 5 at 10 5 at 10 20 V s EXTREF AI 10 k 25 15 AOGND AO DGND DO VCC DO 0 1 Short circuit to ground 1A at 5 DIO 0 7 DIO VCC 0 5 13 at VCC 0 4 24 at 0 4 1 1 50...

Страница 46: ...connections The maximum input voltage ratings are listed in the Protection column of Table 4 3 GPCTR1_OUT DO 3 5 at VCC 0 4 5 at 0 4 1 5 50 k pu PFI5 UPDATE DIO VCC 0 5 3 5 at VCC 0 4 5 at 0 4 1 5 50...

Страница 47: ...re 4 4 PGIA The PGIA applies gain and common mode voltage rejection and presents high input impedance to the AI signals connected to the device Signals are routed to the positive and negative inputs o...

Страница 48: ...ground reference of a floating signal to the device AI ground to establish a local or onboard reference for the signal Otherwise the measured input signal varies as the source floats from the common...

Страница 49: ...anual Input Configurations The following sections discuss the use of single ended and differential input modes and considerations for measuring both floating and ground referenced signal sources Figur...

Страница 50: ...d to measured signal NOT RECOMMENDED V1 ACH ACH AIGND V1 ACH ACH AIGND R See text for information on bias resistors Signal Source Type Floating Signal Source Not Connected to Building Ground Grounded...

Страница 51: ...refore with a DIFF configuration for every channel as many as eight AI channels are available In DIFF input mode the AI channels are paired with ACH i as the signal input and ACH i 8 as the signal ref...

Страница 52: ...he source is unlikely to remain within the PGIA common mode signal range The PGIA then saturates causing erroneous readings To avoid this error reference the source to AIGND by connecting the positive...

Страница 53: ...ce the signal path by connecting another resistor of the same value between the positive input and AIGND as shown in Figure 4 6 This balanced configuration offers slightly better noise rejection but i...

Страница 54: ...Input Connections for Ground Referenced Signals With this type of connection the PGIA rejects both the common mode noise in the signal and the ground potential difference between the signal source an...

Страница 55: ...erence point with other signals DIFF input connections are recommended for greater signal integrity for input signals that do not meet the preceding conditions Using application software you can confi...

Страница 56: ...local ground reference connects to the PGIA negative input The ground point of the signal should therefore connect to the AISENSE pin Any potential difference between the NI 6052E ground and the sign...

Страница 57: ...to the device The PGIA can reject common mode signals as long as Vin and Vin input signals are both within 11 V of AIGND Measuring More than Eight Channels with the DAQPad 6052E for BNC The DAQPad 605...

Страница 58: ...s ACH i and ACH i 8 For example the BNC connector labeled ACH0 provides access to single ended channels ACH0 and ACH8 the BNC connector labeled ACH1 provides access to single ended channels ACH1 and A...

Страница 59: ...nd ratings apply to the EXTREF input Usable input voltage range 11 V peak with respect to AOGND Absolute maximum ratings 15 V peak with respect to AOGND AOGND is the ground reference signal for both A...

Страница 60: ...in Table 4 3 can damage the device and the computer NI is not liable for any damage resulting from such signal connections Figure 4 13 shows signal connections for three typical DIO applications Figur...

Страница 61: ...the overcurrent condition is removed These pins are referenced to DGND and you can use them to power external digital circuitry The fuse power rating is 4 65 to 5 25 VDC at 1 A Caution Do not connect...

Страница 62: ...ional as outputs they are not programmable and reflect the state of many DAQ waveform generation and general purpose timing signals The NI 6052E has five other dedicated outputs for the remainder of t...

Страница 63: ...each PFI pin to output a specific internal timing signal For example if you need the CONVERT signal as an output to the I O connector the application software can turn on the output driver for the PFI...

Страница 64: ...scribing the particular signals Data Acquisition Timing Connections The timing signals are TRIG1 TRIG2 STARTSCAN CONVERT AIGATE SISOURCE SCANCLK and EXTSTROBE Posttriggered data acquisition allows you...

Страница 65: ...or either rising or falling edge The selected edge of TRIG1 starts the sequence for both posttriggered and pretriggered acquisitions Refer to Figures 4 15 and 4 16 for the relationship of TRIG1 to the...

Страница 66: ...gered operation TRIG2 Signal Any PFI pin can externally input the TRIG2 signal which is available as an output on the PFI1 TRIG2 pin Refer to Figure 4 16 for the relationship of TRIG2 to the sequence...

Страница 67: ...ed mode the device acquires data both before and after receiving TRIG2 As an output TRIG2 reflects the posttrigger in a pretriggered sequence even if the acquisition is externally triggered by another...

Страница 68: ...lly triggered CONVERT As an output STARTSCAN reflects the actual start pulse that initiates a scan even if the starts are externally triggered by another PFI You have two output options The first opti...

Страница 69: ...rate the STARTSCAN pulses by at least one scan period A counter on the device internally generates STARTSCAN unless you select some external source The TRIG1 signal starts this counter and the applica...

Страница 70: ...selection for either rising or falling edge The selected edge of CONVERT initiates an A D conversion As an output CONVERT reflects the actual convert pulse that connects to the ADC even if the convers...

Страница 71: ...O connector AIGATE can mask off scans in a sequence You can configure the PFI pin you select as the source for AIGATE in level detection mode You can configure the polarity selection for the PFI pin...

Страница 72: ...on begins The polarity of this output is software configurable but the polarity is typically configured so that a low to high leading edge can clock external analog input multiplexers indicating when...

Страница 73: ...form Generation Timing Connections The analog group defined for the device is controlled by WFTRIG UPDATE and UISOURCE WFTRIG Signal Any PFI pin can externally input the WFTRIG signal which is availab...

Страница 74: ...etection mode You can select any PFI pin as the source for UPDATE and configure the polarity selection for either rising or falling edge The selected edge of UPDATE updates the outputs of the DACs To...

Страница 75: ...nter normally generates UPDATE unless you select an external source The UI counter is started by the WFTRIG signal and can be stopped by the application software or the internal buffer counter BC D A...

Страница 76: ...igh or active low The maximum allowed frequency is 20 MHz with a minimum pulse width of 23 ns high or low There is no minimum frequency Either the 20 MHz or 100 kHz internal timebase normally generate...

Страница 77: ...imum allowed frequency is 20 MHz with a minimum pulse width of 23 ns high or low There is no minimum frequency The 20 MHz or 100 kHz timebase normally generates GPCTR0_SOURCE unless you select some ex...

Страница 78: ...UT reflects the terminal count TC of general purpose counter 0 You have two software configurable output options pulse on TC and toggle output polarity on TC The output polarity is software configurab...

Страница 79: ...s the actual clock connected to general purpose counter 1 even if the source clock is externally generated by another PFI This output is set to high impedance at startup The maximum allowed frequency...

Страница 80: ...irements for GPCTR1_GATE Figure 4 37 GPCTR1_GATE Signal Timing GPCTR1_OUT Signal This signal is available only as an output on the GPCTR1_OUT pin The GPCTR1_OUT signal monitors the TC device general p...

Страница 81: ...he rising edge of the SOURCE signal This timing diagram assumes that the counters are programmed to count rising edges If you program the counter to count falling edges the source signal is inverted a...

Страница 82: ...ck by the numbers 1 through 16 The input clock of the frequency generator is software configurable from the internal 10 MHz and 100 kHz timebases The output polarity is software configurable This outp...

Страница 83: ...lel paths at a close distance To reduce the magnetic coupling between lines separate them by a reasonable distance if they run in parallel or run the lines at right angles to each other Do not run sig...

Страница 84: ...lowest most difficult and most accurate Choose a level according to the demands of your application Loading Calibration Constants Before shipment the device is factory calibrated at approximately 25 C...

Страница 85: ...rily in relative measurements you can ignore a small amount of gain error and self calibration is sufficient External Calibration The device has an onboard calibration reference to ensure the accuracy...

Страница 86: ...to work only with the internal 10 V reference Therefore in general it is not possible to calibrate the AO gain error when using an external reference In this case account for the nominal gain error of...

Страница 87: ...channels PCI PXI 6052E DAQPad 6052E 16 single ended or 8 differential software selectable Type of ADC Successive approximation Resolution 16 bits 1 in 65 536 Max sampling rate 333 kS s guaranteed Inpu...

Страница 88: ...06 66 3 6 6 0 25 0 25 0 0304 0 0312 0 0321 31 6 32 8 3 0 0 0006 39 2 3 9 0 1 0 1 0 0304 0 0312 0 0321 15 6 22 4 2 1 0 0006 27 7 2 8 0 05 0 05 0 0304 0 0312 0 0321 10 3 19 9 1 9 0 0006 25 3 2 5 10 0 0...

Страница 89: ...des 16 bits guaranteed Offset error Pregain error after calibration 1 0 V max Pregain error before calibration 2 6 mV max Postgain error after calibration 76 mV Postgain error before calibration 82 mV...

Страница 90: ...B 10 V input gain 0 5 to 5 83 dB gain 10 Settling time for full scale step Full Scale Step Accuracy Settling Time1 6 LSB 3 s max 4 LSB 4 s max 2 LSB 5 s max gain 0 5 to 10 10 s max gain 20 to 50 10 s...

Страница 91: ...re coefficient Pregain 4 V C Bipolar postgain 120 V C Unipolar postgain 30 V C Gain temperature coefficient 17 ppm C Onboard calibration reference Level 5 000 V 1 0 mV over full operating temperature...

Страница 92: ...fore calibration 4 LSB max DNL After calibration 0 5 LSB typ 1 0 LSB max Before calibration 3 LSB max Monotonicity 16 bits guaranteed after calibration Offset error After calibration 305 V max Before...

Страница 93: ...0 to 10 V EXTREF 0 to EXTREF software selectable Output coupling DC Output impedance 0 1 max Current drive 5 mA max Protection Short circuit to ground Power on state 0 V 20 mV External reference inpu...

Страница 94: ...1 0 mV over full operating temperature actual value stored in EEPROM Temperature coefficient 0 6 ppm C max Long term stability 6 ppm Digital I O Number of channels 8 input output Compatibility TTL CM...

Страница 95: ...bits Compatibility TTL CMOS Base clocks available Counter timers 20 MHz 100 kHz Frequency scalers 10 MHz 100 kHz Base clock accuracy 0 01 Max source frequency 20 MHz Min source pulse duration 10 ns in...

Страница 96: ...ion 0 5 to VCC 0 5 V when configured as a digital signal 35 V when configured as an analog trigger signal or disabled 35 V powered off Accuracy 1 0 of full scale range max Digital Trigger Compatibilit...

Страница 97: ...6 by 10 cm 6 3 by 3 9 in DAQPad 6052E 30 7 by 25 4 by 4 3 cm 12 1 by 10 by 1 7 in I O connector NI PCI PXI 6052E 68 pin male SCSI II type DAQPad 6052E 68 pin male SCSI II type or 15 BNCs and 30 remova...

Страница 98: ...011 Class A at 10 m FCC Part 15A above 1 GHz Electrical immunity Evaluated to EN 61326 1997 A1 1998 Table 1 Note For full EMC compliance you must operate this device with shielded cabling In addition...

Страница 99: ...air assuming that you use differential inputs Connect the shield for each signal pair to the ground reference at the source Route the analog lines separately from the digital lines When using a cable...

Страница 100: ...use the SH6850 or R6850 cable assemblies Figure B 1 50 Pin Connector Pin Assignments GPCTR0_OUT PFI8 GPCTR0_SOURCE PFI6 WFTRIG GPCTR1_OUT PFI3 GPCTR1_SOURCE PFI1 TRIG2 EXTSTROBE 5V DGND DIO3 DIO2 DIO...

Страница 101: ...DAQ STC you can interconnect a wide variety of internal timing signals to other internal blocks The interconnection scheme is flexible and software configurable Capabilities such as buffered pulse gen...

Страница 102: ...6 5 or later for the PCI 6052E The PXI 6052E requires NI DAQ 6 6 or later The DAQPad 6052E requires NI DAQ 6 9 2 or later You can download NI DAQ from the NI Web site at ni com download What is FireWi...

Страница 103: ...Manual for PC Compatibles contains example code and describes the general programming flow when using the NI DAQ C API For a list of functions that support the NI 6052E refer to the NI DAQ Function R...

Страница 104: ...eaks backward through that channel If the output impedance of the source connected to ACH1 is high enough the resulting reading can somewhat reflect the voltage trends in ACH0 To circumvent this probl...

Страница 105: ...o PFI pin high to low and clock source string set to 5 3 Initiate AI data acquisition which starts when the AO waveform generation starts 4 Initiate AO waveform generation Can I programmatically enabl...

Страница 106: ...hannel How can I use the STARTSCAN and CONVERT signals on the NI 6052E device to sample the AI channel s NI E Series devices use the STARTSCAN and CONVERT signals to perform interval sampling As Figur...

Страница 107: ...and frequency shift keying The DAQ STC also makes buffered operations possible such as direct up down control single or pulse train generation equivalent time sampling buffered period and buffered se...

Страница 108: ...lines serve as connections to virtually all internal timing signals If you are using NI DAQ or Measurement Studio use the Select_Signal function to route internal signals to the I O connector route ex...

Страница 109: ...r low However these lines can have pull up or pull down resistors connected to them as shown in Table 4 2 I O Connector Signal Descriptions and Table 4 3 I O Signal Summary These resistors weakly pull...

Страница 110: ...ssisted Support Options Contact NI engineers and other measurement and automation professionals by visiting ni com ask Our online system helps you define your question and connects you to the experts...

Страница 111: ...refix Meanings Value n nano 10 9 micro 10 6 m milli 10 3 k kilo 103 M mega 106 G giga 109 Symbols percent positive of or plus negative of or minus greater than greater than or equal to less than less...

Страница 112: ...to digital converter an electronic device often an integrated circuit that converts an analog voltage to a digital number ADE application development environment an application designed to make it eas...

Страница 113: ...digital signals you group channels to form ports Ports usually consist of either four or eight digital channels channel rate reciprocal of the interchannel delay clock hardware component that control...

Страница 114: ...mputer for processing 2 collecting and measuring the same kinds of electrical signals with A D and or DIO devices plugged into a computer and possibly generating control signals with D A and or DIO de...

Страница 115: ...arily store incoming or outgoing data until that data can be retrieved or output For example an analog input FIFO stores the results of A D conversions until the data can be retrieved into system memo...

Страница 116: ...pose counter 1 clock source signal GPCTR1_UP_DOWN general purpose counter 1 up down GS grounded source H Hz hertz the number of scans read or updates written per second hysteresis lag between making a...

Страница 117: ...ode used to indicate device status LSB least significant bit M m meters MB megabytes of memory MIO multifunction I O MITE MXI Interface to Everything a custom ASIC designed by National Instruments tha...

Страница 118: ...thermocouples NRSE nonreferenced single ended mode all measurements are made with respect to a common NRSE measurement system reference but the voltage at this reference can vary with respect to the m...

Страница 119: ...PXIbus standard was originally developed by National Instruments in 1997 and it is now managed by the PXIbus Systems Alliance R referenced signal sources signal sources with voltage signals that are...

Страница 120: ...CLK scan clock signal SCXI Signal Conditioning eXtensions for Instrumentation the National Instruments product line for conditioning low level signals within an external chassis near sensors so only h...

Страница 121: ...oining two dissimilar metals The junction produces a small voltage as a function of the temperature TIO timing input output tout output delay time TRIG trigger signal trigger any event that causes or...

Страница 122: ...el in the group UPDATE update signal V V volts VCC positive voltage supply VDC volts direct current VI virtual instrument 1 a combination of hardware and or software elements typically used with a PC...

Страница 123: ...Glossary National Instruments Corporation G 13 NI 6052E User Manual W W watts waveform multiple voltage readings taken at a specific sampling rate WFTRIG waveform generation trigger signal...

Страница 124: ...erations for selecting input ranges 3 4 unipolar and bipolar 3 3 multichannel scanning considerations 3 5 signal connections 4 8 specifications A 1 amplifier characteristics A 3 dynamic characteristic...

Страница 125: ...abling B 1 field wiring considerations 4 44 optional equipment 1 6 calibration adjusting gain error 5 3 external calibration 5 2 loading calibration constants 5 1 self calibration 5 2 charge injection...

Страница 126: ...ions 4 22 specifications A 8 digital trigger specifications A 10 DIO 0 7 signal description table 4 4 digital I O signal connections 4 22 external expansion connector 4 6 I O signal summary table 4 7...

Страница 127: ...eneral purpose timing signal connections 4 39 GPCTR0_UP_DOWN signal digital I O 3 10 general purpose timing signal connections 4 40 GPCTR1_GATE signal 4 41 See also PFI4 GPCTR1_GATE signal general pur...

Страница 128: ...stions C 2 hardware 2 1 software 2 1 unpacking 6052E devices 2 1 instrument drivers D 1 K KnowledgeBase D 1 L LabVIEW application software 1 4 LEDs Communication LED 2 4 Power LED 2 4 M Measurement St...

Страница 129: ...signal description table 4 5 external expansion connector 4 6 I O signal summary table 4 8 PFI8 GPCTR0_SOURCE signal See also GPCTR0_SOURCE signal description table 4 5 I O signal summary table 4 8 PF...

Страница 130: ...al connections PCI figure 3 13 PXI figure 3 14 specifications A 10 S sampling rate C 1 SCANCLK signal DAQ timing connections 4 26 description table 4 4 I O signal summary table 4 7 scanning multichann...

Страница 131: ...6 voltage output A 7 bus interface A 10 digital I O A 8 physical A 11 power requirement A 11 timing I O A 9 triggers analog trigger A 9 digital trigger A 10 RTSI trigger A 10 STARTSCAN signal 4 30 See...

Страница 132: ...4 28 See also PFI1 TRIG2 signal trigger specifications analog trigger A 9 digital trigger A 10 RTSI trigger A 10 triggers analog trigger 3 7 RTSI triggers 3 13 troubleshooting resources D 1 U UISOURC...

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