WF1947/WF1948 Instruction Manual (External Control)
272
6.3.134 ?STS
Description
Read status bytes.
Only RQS bit (Bit 6) is cleared among each bit of status byte even if it is read from
the ?STS and the serial port.
The other bits are cleared when each register/event is cleared.
When the clear at power-on flag is set to 1 by PSC commands, the flag consequently
become 0.
Response format
Status byte (0 to 255)
Type 2 (For reference)
Settings: None
Query: *STB?
Response example
STS 0
☞
See "3. Status System."
Compatibility Information
Compatibility support
6.3.135 STT/?STT
Description
Sets/queries the transfer start address to update the waveform data in the middle of the
arbitrary waveform.
The transfer start address is reset (address: 0) in the case of the following situations.
•The waveform data transfer is stopped by the ARB command
•The size of the arbitrary waveform data is changed
•After power-on
•The transfer start address is omitted
Parameters
Transfer starting address
The arbitrary waveform data size 8KW
→
0~8191, 16KW
→
0~16383,
32KW
→
0~32767, 64KW
→
0~65535
Type 2 (For reference)
Settings: :DATA:DAC:ADDRess [<start address>]
Query: :DATA:DAC:ADDRess?
Setting example
Transfers the arbitrary waveform data from the address 2048.
Type 1: STT 2048
Type 2 (For reference):DATA:DAC:ADDR 2048
Compatibility Information
Compatibility support
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