Peak 555A User’s Guide
BIOS Setup 4-
17
Chipset Features Setup Menu
Since the features in this section are related to the chipset in the CPU board
and all are optimized, you are not recommended to change the default
settings in the setup table, unless you know very detailed of the chipset
features.
ROM PCI/ISA BIOS (Peak-555)
CHIPSET FEATURES SETUP
AWARD SOFTWARE, INC.
Refresh Rate Control
: 15-6us
System BIOS Cacheable
: Enabled
Ref/Act Command Delay
: 6T
Video BIOS Cacheable
: Enabled
Refresh Queue Depth
: 12
Memory Hole at 15M-16M :
Disabled
RAS Precharge Time
: 3T
PCI Post Write Buffer
:
Disabled
RAS to CAS Delay
: 3T
PCI Delayed Transaction
:
Disabled
ISA Bus Clock Frequency :
PCICLK/4
Auto Detect DIMM/PCI
Clk
:
Disabled
Starting Point of Paging
: 1T
Spread Spectrum
:
Disabled
NA# Enable
: Disabled
L2 Cache Burst RD Cycle : Enabled
Asyn/Sync Mode
CPU/DRAM
:
Asynchronous
SDRAM CAS Latency
: 2T
SDRAM WR Retire Rate
: x-1-1-1
DRAM Opt RAS
Precharge
: Disabled
PCI Peer Concurrency
: Enabled
Read Prefetch Memory
RD
: Enabled
Assert TRDY After Prefet
: V
ESC : Quit
↑
↓
→
←
: Select Item
CPU to PCI Burst Mem.
WR
: Enabled
F1 : Help PU/PD/+/- : Modify
CPU to PCI Post Write
: Enabled
F5 : Old Values (Shift) F2 : Color
:
F6 : Load BIOS Defaults
AGP Aperture Size
: 4MB
F7 : Load Setup Defaults