NEC VERSA S, Руководство по обслуживанию, Страница: 21 / 100

1-10 Technical Information
Table Section 1-7 Versa S Series Interrupt-Level Assignments
Controller
Master/Slave
Priority
Name
Device
Master 0 IRQ00 Counter/Timer 1
Master 1 IRQ01 Keyboard
Master 2 IRQ02 Cascade for 8 to 15
Slave 3 IRQ08 Real-time Clock
Slave 4 IRQ09 VGA
Slave 5 IRQ10 Reserved
Slave 6 IRQ11 Reserved (PCMCIA)
Slave 7 IRQ12 PS/2 Mouse*
Slave 8 IRQ13 Math Coprocessor (built into CPU)
Slave 9 IRQ14 Hard Disk Controller
Slave 10 IRQ15 Reserved
Master 11 IRQ03 COM2, COM4*
Master 12 IRQ04 COM1, COM3*
Master 13 IRQ05 Parallel Port 2
Master 14 IRQ06 Diskette Drive Controller*
Master 15 IRQ07 Parallel Port 1*
*Industry standard locations
Power Management Overview
The Versa system uses power management features to prolong system battery life.
The CPU (SL Enhanced i486) implements a System Management Interrupt (SMI) function
that works transparently with the operating system and application software. When acti-
vated, the processor mode changes to real mode. Unique "SM-RAM" containing power
management software is mapped at address 30000h — 3FFFFh. This activity is inherent to
the system and does not require any adjustment to the operating system or application soft-
ware.
The power management program is located in ROM at location E8000h — EFFFFh. In on-
board DRAM, the software is physically allocated at the same location.
Use the System Configuration Utility to select specific power management options. For in-
formation on how to select these options, see Section 3, Power Management.