R6
V-SYNC
V-OUT
R3
D1
R1
C2
R2
R5
R12
Q5
Q1
D4
R4
D5
Q2
C3
G1
R11
R10
C4
ZD1
C5
V2
V1
V3
Q3
R7
D6
VCC
Q4
VE
R9
R8
MUTE
BRIGHT
CONTER
+
Q6
71
6.
Blanking and spot killer
Circuit Diagram
Description of the circuit:
1) The vertical blanking circuit completes by Q1, Q2, Q3 and peripheral circuit.
The vertical sync pulse applied to R3, R12 connected to Q5 base. Q5 is invert amplifier, then
mixer with Q1 base together for compensate vertical retrace time of the blanking pulse.
2) The vertical amplifier output waveform through D1, C2, R1, R2 make waveform forming and
clamp. Then applied to Q1 base, the vertical blanking amplifier of the Q1, the output connected
to buffer Q2, through C3 coupling to G1 control circuit. D4, D5 for over voltage protect.
3) The Q6 is spot killer protect circuit, in normal power on stage.
V1 = V2 and ZD1, so Q6 off. The CRT G1 voltage is fixed at –45 ~
−
67V
DC
with vertical blanking
pulse 12Vpp VG1 =
−
(V
×
R11) / (R10 + R11), (V = V1
−
V3).
When power off the voltage V1 > V2, then Q6 turn on pulling VG1 to –180V to protect CRT.
4) When Mute set to lower the Q3 off G1 =
−
180V screen cut off no picture display, this mute circuit
makes active, at power ON/OFF and when mode change stage.
5) Q4 bias set up by MCU to control the V
CE
bias of Q3, then control G1 voltage output.
Test points for maintenance:
1) Check D1, R3 and Q1 collector
2) G1 voltage control range=
−
45 ~
−
67VDC
G1 off momentary voltage
¡Ü
¡Ü
¡Ü
¡Ü
¡Ü
−
180VAC
Содержание MultiSync 75F-3
Страница 56: ...DDC Flow Chart 53 ...
Страница 57: ...Master I C Flow Chart 54 ...
Страница 58: ...Master I C restart mode Flow Chart 55 ...
Страница 59: ...Slave I C Flow Chart 56 ...
Страница 61: ...BLOCK DIAGRAM I C bus autosync deflection controller for PC monitors TDA4857 58 ...
Страница 71: ...I C bus autosync deflection controller for PC monitors TDA4857 68 APPLICATION INFORMATION ...
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