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24
µ
PD78C14(A)
Instruc-
tion group
Instruction code
Mnemonic
Operand
State
Operation
Skip
condition
B1
B2
B3
B4
A, byte
0 1 0 0 0 1 1 1
7
A byte
r, byte
0 1 1 1 0 1 0 0
11
r byte
*
*
0 1 0 0 1 R
2
R
1
R
0
sr2, byte
0 1 1 0
14
sr2 byte
ONI
A, byte
r, byte
sr2, byte
S
3
1 0 0 1 S
2
S
1
S
0
0 1 0 1 0 1 1 1
0 1 1 1 0 1 0 0
0 1 1 0
7
A byte
11
r byte
14
sr2 byte
Arithmetic operation of
immediate data
OFFI
ADCW
SBBW
ORAW
LTAW
ONAW
wa
0 1 1 1 0 1 0 0
wa
wa
wa
wa
wa
wa
wa
Data
14
14
14
14
14
14
14
14
14
14
14
14
14
14
A
←
A+(V.wa)
A
←
A+(V.wa)+CY
A
←
A+(V.wa)
A
←
A–(V.wa)
A
←
A–(V.wa)
A
←
A (V.wa)
A
←
A (V.wa)
A
←
A (V.wa)
A–(V.wa)–1
A–(V.wa)
A–(V.wa)
A–(V.wa)
A (V.wa)
wa
wa
wa
wa
wa
wa
Data
0 1 0 1 1 R
2
R
1
R
0
S
3
1 0 1 1 S
2
S
1
S
0
Data
1 1 0 1
1 0 1 0
1 1 1 1
1 0 1 1
1 0 0 1
1 0 0 1 0 0 0 0
1 0 1 1
1 1 1 0
1 1 0 0
Data
offset
No
Zero
Zero
No
Borrow
No
Zero
Borrow
<
EQAW
NEAW
XRAW
GTAW
SUBNBW
ANAW
ADDNCW
SUBW
ADDW
1 1 0 0 0 0 0 0
1 1 1 0
1 0 0 0 1 0 0 0
1 0 1 0 1 0 0 0
1 1 1 1
No
Zero
No
Borrow
No
Carry
No
Zero
No
Zero
Zero
Zero
Zero
<
<
<
<
<
<
<
>
>
A
←
A–(V.wa)–CY
Arithmetic operation of working register
*