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PXIe-4309 Calibration Procedure
Table 2.
DC Offset Verification Test Limits
PXIe-4309 Configuration
Test Limits (
μ
V)
Channels
Input
Range
Auto Zero
Chopping
Lower
Upper
AI0..31
*
±0.1 V
None
**
Disabled
-6
6
±1.0 V
-10
10
±10 V
-100
100
±15 V
-150
150
AI0..31
*
±0.1 V
Once
Disabled
-5
5
±1.0 V
±10 V
-50
50
±15 V
-75
75
AI0..31
*
±0.1 V
Every Sample
Disabled
-4
4
±1.0 V
±10 V
±15 V
AI0..15
†
±0.1 V
None
Enabled
-2
2
±1.0 V
±10 V
±15 V
*
Verification of channels 0 through 31 provides coverages of each of the 32 independent input paths of
the PXIe-4309.
**
Auto Zero None Test Limits include residual temperature coefficient for
±1.0 °C.
†
Verification of channels 0 through 15 provides coverage of each of the 16 independent matching
chopping pairs of the PXIe-4309.
