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9.2 Power Supply Status Structure
Status and Fault Register shows the status register structure of the power supply. The Standard
Event, Status Byte, and Service Request Enable registers and the Output Queue perform standard
functions as defined in the IEEE 488.2 Standard Digital Interface for Programmable Instrumentation.
The Operation Status and Questionable Status registers implement status functions specific to
the power supply.
9.3 Condition Registers
There are two registers that the user may read to see the condition of the supply. The register
bits are set to show a fault or if an operating mode is active. The bits are cleared when the fault
or mode is cleared. The registers are read-only.
9.3.1 Fault Register
The fault register sets a bit when a Fault occurs (Refer to table 9-1). The bit is cleared when the
fault condition is removed.
Bit Number Decimal Value Bit Symbol Description
0 1
1 2 AC AC Fail
2 4 OTP Over Temperature
3 8 FLD Fold Back Protection
4 16 OVP Over Voltage Protection
5 32 SO Shut Off
6 64 OFF Output Off
7 128 INT Interlock
8 256 UVP Under Voltage Protection
9 512 0 Not used
10 1024 INPO Internal Input Overflow *
11 2048 INTO Internal Overflow *
12 4096 ITMO Internal Time Out *
13 8192 ICOM Internal Comm Error *
14 to 15 N/A 0 Not used
Table 9-1: Bit Configuration of Questionable Registers