Index
I-2
www.ni.com
genlock synchronization generator, 3-3
PCI interface, 3-4
pixel aspect ratio circuitry, 3-3
scatter-gather DMA controllers, 3-3 to 3-4
trigger control, 3-4
video acquisition, 3-4 to 3-7
acquisition window control,
3-5 to 3-6
programming video parameters,
3-6 to 3-7
start conditions, 3-4 to 3-5
video buffer, 3-2
horizontal count, 3-5
HSYNC
acquisition window control, 3-5
genlock synchronization generator, 3-3
I
IMAQ Vision software, 1-5
IMAQ Vision Builder software, 1-5
installation. See also configuration.
procedure for, 2-4 to 2-5
setting up IMAQ system, 2-2 to 2-3
unpacking the PCI/PXI-1407, 1-6
integration with DAQ and motion control, 2-4
interlaced video, 3-7
internal pixel clock specifications, A-2
I/O connector, 4-1 to 4-2
signal descriptions (table), 4-2
L
line count
definition, 3-5
programmable pixel and line count, 3-6
line region, active, 3-5
lookup table, 8-bit ADC and LUT, 3-2
M
motion control and DAQ, integrating with, 1-6
N
National Instruments web support, B-1 to B-2
NI-IMAQ driver software, 1-4
P
PCI interface
overview, 3-4
specifications, A-2 to A-3
PCI/PXI-1407 devices. See also hardware
overview.
features and overview, 1-1
optional equipment, 2-2
requirements for getting started, 2-1 to 2-2
setting up IMAQ system, 2-2 to 2-3
software programming choices, 1-2 to 1-6
IMAQ Vision software, 1-5
IMAQ Vision Builder software, 1-5
NI-IMAQ driver software, 1-4
unpacking, 2-4
PCLK
genlock synchronization generator, 3-3
internal pixel clock specifications, A-2
physical specifications, A-3
picture aspect ratio, 3-5
pin assignments
BNC connectors (figure), 4-1
pixel aspect ratio, defined, 3-6
pixel aspect ratio circuitry, 3-3
pixel clock. See PCLK.
pixels
active pixel region, 3-5
horizontal count, 3-5
line count, 3-5
programmable pixel and line count, 3-6
power requirements, A-3
