Chapter 3
Hardware Overview
3-4
www.ni.com
controller to reconfigure on-the-fly. Thus, the PCI/PXI-1407 can
perform continuous image transfers to either contiguous or fragmented
memory buffers.
PCI Interface
The PCI/PXI-1407 implements the PCI interface with a National
Instruments custom application-specific integrated circuit (ASIC), the
PCI MITE. The PCI interface can transfer data at a maximum rate of
132 Mbytes/s in master mode, which maximizes the available PCI
bandwidth. The PCI/PXI-1407 can generate 8-, 16-, and 32-bit memory
read and write cycles, both single and multiple. In slave mode, the
PCI/PXI-1407 is a medium speed decoder that accepts both memory and
configuration cycles. The interface logic ensures that the PCI/PXI-1407
meets the loading, driving, and timing requirements of the PCI
specification.
Trigger Control
This circuit controls the direction and functionality of the external trigger
line. The trigger can start an image acquisition when used as an input
signal. As an output signal, the control circuit can drive the line asserted or
unasserted to trigger an external event. Also, it can connect internal signals
such as HSYNC and VSYNC to the trigger line.
Video Acquisition
The PCI/PXI-1407 can acquire video signals in a variety of modes and
transfer the digitized fields or frames to PCI system memory.
Start Conditions
The PCI/PXI-1407 can start acquisition on a variety of conditions:
•
Software control—The PCI/PXI-1407 supports software control
of acquisition start and stop. In addition, you can configure the
PCI/PXI-1407 to capture a fixed number of frames. Use this
configuration to capture single frames or a sequence of frames.
•
Trigger control—You can also start an acquisition by using the
external trigger line, which can start video acquisition on a rising
or falling edge.